Xilinx, Inc.

Karthic P

Srinivasan Dasasathyan

Satish B Sivaswamy

Xiaojian Yang

Mehrdad Eslami Dehkordi

Paul D Kundarewich

Meghraj Kalase

Amish Pandya

Satish Bachina

Vishal Tripathi

Multiple classifier models are applied to features of a circuit design after processing the design through a first phase of an implementation flow. Each classifier model is associated with one of multiple directives, the directives are associated with a second phase of the implementation flow, and each classifier model returns a value indicative of likelihood of improving a quality metric. Regressor models of each set of a plurality of sets of regressor models are applied to the features. Each directive is associated with one of the sets of regressor models, and a combined score from each set of regressor models indicates a likelihood of satisfying a constraint. The directives are ranked based on the values indicated by the classifier models and scores from the sets of regressor models, and the circuit design is processed n the second phase of the implementation flow by the design tool using the directive having the highest rank.

Satisfying circuit design constraints using a combination of machine learning models

Methods and systems for selecting between single-process and multi-process implementation flows involve identifying features of a circuit design by a design tool. A classification model is applied to the features. The classification model indicates whether an implementation flow on the circuit design is likely to have a runtime within a first range of runtimes or a runtime within a second range of runtimes. The implementation flow is executed by the design tool in a single process in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the first range of runtimes. The implementation flow is executed by the design tool in a plurality of processes in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the second range of runtimes.

Optimizing use of computer resources in implementing circuit designs through machine learning

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Chennai, India

Karthic P