Infineon Technologies Ag

Karlheinz Mueller

Gernot Langguth

Klaus Roeschlau

Bernhard Winkler

Jakob Huber

Holger Wille

Christian Herzum

Robert Gruenberger

Klaus Koller

Kevni Bueyuektas

Michael Runde

Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.

Micro-electromechanical system devices

Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Integrated transistor, particularly for voltages and method for the production thereof

An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.

Integrated circuit arrangement comprising a pin diode, and production method

An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is disposed in the semiconductor body and extends through the region of the first conductivity type. A semiconductor of a second conductivity type is disposed within the channel adjacent the region of the first conductivity type such that the region of the first conductivity type and the semiconductor of the second conductivity type form a diode. At least one of the region of the first conductivity type and the semiconductor of the second conductivity type is electrically coupled to the structure to be protected.

ESD protection structures for semiconductor components

In a method for manufacturing a micromechanical device having a region for forming an integrated circuit, at first a first layer is produced on a deeper-lying part in the substrate. Subsequently, a membrane layer is produced on the first layer and at least one channel completely penetrating the membrane layer is introduced in the membrane layer. After that, a region of the first layer below the membrane layer is removed to form a cavity. Finally, the channel is sealed and a planar surface is formed.

Micromechanical device and method for manufacturing a micromechanical device

A coil apparatus includes a coil trace, a semiconductor substrate and a dielectric layer arranged on the semiconductor substrate, at least parts of the coil trace being arranged above a recess in the dielectric layer. The coil apparatus further includes a support apparatus arranged in the recess and connected to the coil trace for mechanically supporting the coil trace. The supporting apparatus is preferably a conductive column that is not removed when the recessed is formed in the dielectric layer.

Coil on a semiconductor substrate and method for its production

In a method for producing a gate structure for a MOS transistor, first, a layer sequence of oxide layer, auxiliary layer and masking layer is generated on a substrate, wherein the auxiliary layer and the masking layer are patterned to determine an edge separating an area of the oxide layer covered by these layers from an exposed area thereof. Afterwards, an oxidation is performed to generate an oxide ramp in the area of the edge. Then, the auxiliary layer is partly removed to generate a hollow space of predetermined length between the oxide layer and the masking layer. A gate electrode material is introduced into the hollow space for generating a gate electrode.

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Velden, Germany

Karlheinz Mueller