Altera Corporation

Karl Schabas

Deshanand Pratap Singh

Valavan Manohararajah

Terry Borer

Stephen D Brown

Gabriel Quan

Kevin Chan

Ivan Hamer

Ian Chesal

Paul McHardy

Shawn Malhotra

A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes duplicating a plurality of components in response to slack values associated with connections to the components in placement locations.

Method and apparatus for performing compound duplication of components on field programmable gate arrays

A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying registers on near-critical paths. The registers are moved to shorten lengths of one or more near-critical paths.

Method and apparatus for performing retiming on field programmable gate arrays

A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes synthesizing a design for the system. Components in the design are mapped onto resources on the target device. Placement locations are determined for the components on the target device. The design for the system is restructured after placement locations for the components are determined to improve timing for the system.

Method and apparatus for performing post-placement functional decomposition for field programmable gate arrays

A method for designing a system on a target device utilizing field programmable gate arrays is disclosed. A design is synthesized for the system. Components in the design are mapped onto resources on the target device. Placement locations are determined for the components on the target device. Components to replicate are identified in response to criticality determined from the placement locations.

Method and apparatus for performing logic replication in field programmable gate arrays

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Toronto, Canada

Karl Schabas