International Business Machines Corporation

Karl L Ladin

Erik S Unterborn

James David Strom

John T Trnka

Robert L Hedman

Gordon G Koehler

Systems and computer program products for layout device matching driven by a schematic editor. Exemplary embodiments include identifying a master device in a circuit layout having at least transistors, the master device having property values including at least one of topology, name and device-type, identifying a cloned device linked to the master device, automatically propagating the property values to the cloned device, making changes to a design layout of the master device, including a change to the properties, and automatically propagating the changes to the design layout and the change to the properties of the master device to the cloned device.

Methods, systems and computer program products for layout device matching driven by a schematic editor

A method and a system for displaying hierarchical navigating, debugging and editing of selected hierarchical levels of design of a plurality of hierarchical levels of design in graphical hierarchical design applications, by assigning, from a schematic of the integrated circuit, a viewable scope of a block element desired for traversing. Opening the viewable scope of the block element, by using a mouse scrolling device to cause a cursor to highlight and roll in a downward direction over the highlighted block element, while holding down a predefined keyboard key. Then closing the viewable scope of the block element, by causing the cursor to be positioned in an empty area of the schematic, while holding down an other predefined keyboard key and rolling the mouse scrolling device in an upward direction.

Systems, methods and computer products for traversing schematic hierarchy using a scrolling mechanism

A method for designing shielding in integrated circuits, the method comprising, receiving a first input designating a first net segment profile on a first level in an integrated circuit for shielding, determining whether the designated first net segment profile is in electrical communication with other net segment profiles, determining whether the net segment profiles are located in a different level than the first net segment profile, defining a first shielding profile corresponding to the net segment profiles on the first level, defining a second shielding profile corresponding to the net segment profiles on the second level, determining and removing segments of the first shielding profile and the second shielding profile contact features of the integrated circuit, determining and removing segments of the first shielding profile and the second shielding profile are non-continuous, defining vias at the intersections of first shielding profile and the second shielding profile.

Systems and methods involving designing shielding profiles for integrated circuits

A computer converts a description of an analog circuit to a physical representation in terms of devices on a personalizable chip. The devices are placed and wired automatically for fabrication of the chip. Descriptions of resistors in the circuit are expanded by wiring multiple contacts of one or more actual resistor devices on the chip. The chip uses multiple rows of devices arranged in columns; each row contains multiple transistor and resistor devices.

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Rochester, MN, United States of America

Karl L Ladin