Solexel, Inc.

Ob Realty, LLC

Trutag Technologies, Inc.

Dainippon Screen Mfg. Co., Ltd.

Tesla, Inc.

Karl-Josef Kramer

Mehrdad M Moslehi

Takao Yonehara

Jay Ashjaee

David Xuan-Qi Wang

Pawan Kapur

George D Kamian

Subramanian Tamilmani

Sean M Seutter

Anthony Calcaterra

Somnath S Nag

Noriyuki Hayashi

Yasuyoshi Miyaji

Sam Tone Tor

Takamitsu Inahara

Virendra V Rana

David Dutton

Michael Wingert

Emmanuel Van Kerschaver

Suketu Arun Parikh

David Mordo

Nevran Ozguven

Virenda V Rana

Thom Stalcup

Burcu Ucok

Subbu Tamilmani

Homi Fatemi

Yasuhiro Miyaji

Tokuyuki Hayashi

Jay Ash-Jaee

This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Apparatus and methods for uniformly forming porous semiconductor on a substrate

Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.

Backplane reinforcement and interconnects for solar cells

This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

High-throughput batch porous silicon manufacturing equipment design and processing methods

High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.

High productivity deposition reactor comprising a gas flow chamber having a tapered gas flow space

This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

High-productivity porous semiconductor manufacturing equipment

A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 &#x3bc;m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.

Metal foil metallization for backplane-attached solar cells and modules

According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.

Monolithically isled back contact back junction solar cells

An apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates in a batch electrochemical anodic etch process is provided. The apparatus comprises a plurality of edge-sealing template mounts operable to prevent formation of porous silicon at the edges of a plurality of templates. An electrolyte is disposed among the plurality of templates. The apparatus further comprises a power supply operable to switch polarity, change current intensity, and control etching time to produce the porous silicon layers.

Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates

According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.

Releasing apparatus for separating a semiconductor substrate from a semiconductor template

Processing equipment for the metallization of a plurality of semiconductor workpieces. A controlled atmospheric non-oxidizing gas region comprises at least two enclosed deposition zones, the controlled atmospheric non-oxidizing gas region is isolated from external oxidizing ambient. A temperature controller adjusts the temperature of the semiconductor workpiece in each of the at least two enclosed deposition zones. Each of the enclosed deposition zones comprising at least one spray gun for the metallization of the semiconductor workpiece. A transport system moves the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. A batch carrier plate carries the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. The controlled atmospheric non-oxidizing gas region further comprises a gas-based pre-cleaning zone.

High productivity spray processing for the metallization of semiconductor  workpieces

Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

High-efficiency photovoltaic back-contact solar cell structures and manufacturing methods

High-Throughput batch porous silicon manufacturing equipment design and processing methods

A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The reusable template has a three-dimensional (3-D) surface topography comprising a plurality of raised areas comprising a rounded top and separated by a plurality of depressed areas.

Structure and method for creating a reusable template for detachable thin film substrates

Growing community of inventors

San Jose, CA, United States of America

Karl-Josef Kramer