Siemens Aktiengesellschaft

Karl-Heinz Kuesters

Wolfgang Peter Mueller

Gerd Enders

A three-dimensional, one transistor cell arrangement for dynamic semiconductor memories utilizing a trench capacitor in the substrate, and provided with a switching field effect transistor including an insulated gate electrode connected to the source/drain zone, the bit line contact for the connection of the switching transistor being arranged to be self-adjusted on the drain region in the semiconductor substrate, and overlapping the gate electrode with insulating layers on all sides. It also overlaps the neighboring field oxide region. The insulation layer laying beneath the bit line and over the gate level is a triple layer composed of silicon oxide/silicon nitride/silicon oxide, and in the through hole etching which is carried out by specific etching steps, there exists a self-adjusted overlapping contact. By eliminating the imprecision caused by the lithography, the space requirement of a memory cell can be reduced by about 20%. The invention is particularly utilized in the manufacture of 4 megabit DRAMs.

Three-dimensional one-dimensional cell arrangement for dynamic

A transistor varactor for dynamic semiconductor storage means which are formed on a doped silicon substrate having a high integration density and which includes one field effect transistor which has source and drain and a gate and a varactor overlaps the gate electrode and is formed as a stacked capacitor. The gate electrode and the varactor are electrically isolated from each other by insulating layers and the contact of the source zone is electrically isolated from the gate electrode by the insulating layers and the upper polysilicon layer of the varactor formed by oxidation of the side portions of the polysilicon layer. The contact of the source zone adjusts to the gate electrode and to the polysilicon layer in that the distance of the contact of the source zone relative to the gate electrode and the polysilicon layer is independent of the photographic accuracy. A buried contact between the polysilicon layer and the drain zone is self-adjusted relative to the gate electrode.

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Munich, Germany

Karl-Heinz Kuesters