Texas Instruments Corporation

Karl H Jacobs

Jean Picard

David N Abramson

Barry Jon Male

Robert Allan Neidorff

Paul E Buck

Disclosed examples include redundant Power over Ethernet (PoE) systems, powered device (PD) controllers and methods in which a first PD controller sends a signal to indicate to the other PD controllers that the first PD controller is powered, and a second PD controller newly connected or reconnected to a corresponding power sourcing equipment (PSE) refrains from turning off a shared DC-DC converter, and the second PD controller waits to allow an inrush current delay of the corresponding PSE to complete before allowing current flow between the DC-DC converter and the corresponding PSE, and the second PD controller selectively provides a signal to request an application circuit powered by the DC-DC converter to temporarily reduce its power consumption below a predetermined value if the corresponding PSE is configured to provide no more than the predetermined value of power.

Turn on method without power interruption for redundant power over ethernet systems

Turn on method without power interruption redundant power over Ethernet systems

In a Power over Ethernet (PoE) system, a Powered Device (PD) having circuitry to measure the load current from a Power Sourcing Equipment (PSE) in the PD. Circuitry compares the measured load current with a first threshold. Circuitry automatically generates load pulses for signaling the PSE, that power to the PD should be maintained.

Power over ethernet powered device having automatic power signature

A system and method for responding to a current overload condition in a power switch provides a class D topology that applies a current sink or current source to the gate of the power switch. The current sink or source decreases or increases current flowing through the power switch to regulate power switch output current in the event of an overload. A timer for current regulation can be provided to shut off the power switch if the overload condition persists. A set of differently rated switches can be used separately or together to provide a range of current regulation response, from a wide regulation range with a fast response, to a narrow regulation range with a slow response. The system provides a rapid response to an overload condition and output current regulation without disabling the power switch to overcome short term overloads.

System and method for current overload response with class D topology

Circuitry is provided for controlling the slew rate of a negative output supply. The slew rate control circuitry includes an NMOS FET, a feedback resistor connected across the drain and the gate of the NMOS FET, an input resistor connected to the gate of the NMOS FET, level shifting circuitry connected between a positive output supply voltage and the input resistor, and a bias current source connected to the gate of the NMOS FET. A negative input supply voltage is connected to the source of the NMOS FET, and the negative output supply voltage is provided across a load connected to the drain of the NMOS FET. As the positive supply voltage ramps up from 0 to +V, the level shifter provides a voltage to the input resistor that ramps up from &#x2212;Vto 0 volts. Further, the drain voltage of the NMOS FET ramps down from 0 to &#x2212;V, thereby providing a negative output supply voltage &#x2212;Vwith a slew rate that linearly tracks the slew rate of the master positive output supply.

Linear voltage tracking amplifier for negative supply slew rate control

A regulated integrated circuit power supply ( ) intermittently applies feedback to a charge pump ( ) on a sampled basis such that a feedback circuit ( ) is enabled to sense the bias voltage (V ) at predetermined intervals of time. Based upon the value of the bias voltage (V ) as compared to a threshold voltage (V ), the charge pump ( ) is enabled to supply a voltage to the integrated circuit. Thereby, the regulated charge pump ( ) does not overload the integrated circuit coupled thereto. The regulated integrated circuit power supply ( ) includes the charge pump ( ) coupled to the integrated circuit to supply bias voltage (V ). Additionally, coupled to the integrated circuit, the feedback circuit ( ) senses the bias voltage (V ) and provides an output signal based upon a comparison between the bias voltage (V ) and a voltage threshold (V ) A switch ( ) connected to the feedback circuit ( ) selectively enables and disables sensing of the bias voltage (V ). A signal generator ( ) provides at least one output signal. A controller ( ) receives both output signals from the signal generator ( ) and the feedback circuit ( ) to provide a first and a second control signal (V , V ). The first control signal (V ), responsive to the output signal of the signal generator ( ), enables and disables the switch ( ) at predetermined intervals. The second control signal (V ), however, responsive to both output signals, enables and disables the charge pump ( ). Thus, since the bias voltage (V ) is measured intermittently at predetermined intervals, the regulated integrated circuit power supply ( ) does not unnecessarily load the integrated circuit nor increase power consumption.

Method and apparatus for a regulated power supply including a charge pump with sampled feedback

An operational amplifier trim circuit architecture that compensates for fabrication process and temperature drift mismatches reflected to the input as input offset voltage errors without additional temperature compensation circuitry. The operational amplifier includes a first input signal and second input signal applied to an input circuit stage. The input circuit stage amplifies the first input signal differentially with respect to the second input stage and generates a differential current which in turn is applied to a first current path and a second current path. The first current path and second current path have well-matched trim circuits. The first current trim applies a trim current to the first current path, and the second current trim applies a trim current to the second current path. The trim current includes an offset current that is well-matched on both the first current trim path and the second current trim path and, in addition, may have a trim offset current that is present on the first trim current and not on the second trim current or vice versa, depending on the actual mismatch requiring correction on the particular device being trimmed. Thus, since both the first current path and the second current path see identical offset currents that are influenced by temperature variations in the same manner, the input offset voltage of the operational amplifier will have minimum drift over temperature variations.

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Hampton, NH, United States of America

Karl H Jacobs