Gemalto Sa

Thales Dis France Sa

Gemplus

Thales Dis France Sas

Issm

Karine Villegas

Marc Joye

Pascal Paillier

Benoit Chevallier-Mames

Fabrice Perion

Aline Gouget

Louis Goubin

Nicolas Roussel

Charles Coulier

Nathalie Feyt

Mylène Roussellet

Sylvain Leveque

Ali Zeamari

Jean Roch Coulon

Benoit Chevallier Mames

Florence Ques-Rochat

Laurent Gauteron

Nabil Hamzi

Sylvere Teissier

The present invention relates to a device having a central processing unit, RAM memory and at least two hardware elementary operations, using registers of greater size than the one of the central processing unit, said device being such that construction of at least one part of RAM memory is managed only by the hardware elementary operations, hardware elementary operations themselves and masking of inputs/outputs/intermediary data are monitored by software instructions, said software instructions being able to address different cryptographic functionalities using said hardware elementary operations according to several ways depending on each concerned functionality, said software instructions being further able to address several levels of security in the execution of the different functionalities.

Mixed hardware and software instructions for cryptographic functionalities implementation

A processing unit executes a sensitive computation using multiple different and independent branches that each necessitate a given number of processing unit time units to be executed. Each execution of a sensitive computation includes: generating at least as many identifiers as the number of branches; associating each identifier to a unique branch; generating a random permutation of identifiers, wherein the number of occurrences of each identifier in the permutation is at least equal to the number of processing unit time units in the shortest of the branches; successively determining, wherein the determining includes processing each identifier in the random permutation, which branch to execute by each successive processing unit time units according to the identifier in the random permutation; and for each identifier of the random permutation, executing a processing unit time unit for the branch determined according to the identifier in the random permutation.

Random execution of multiple different and independent branches of a sensitive computation against various attacks

The present invention relates to a method to generate prime numbers on board a portable device, said method comprising the steps of, each time at least one prime number is requested:

Method for on-board prime number generation

The invention relates to a method for generating a session key between two communicating electronic devices not requiring any prerecorded information in one of the two devices and enabling the authentication of one of said devices. The method uses a close collaboration between a symmetrical algorithm and an asymmetrical algorithm.

Method for establishing a secured communication without preliminary information share

The invention relates to a cryptographic method involving an integer division of type q=a div b and r=a mod b, wherein a is a number of m bits, b is a number of n bits, with n being less than or equal to m, and bbeing non-null and the most significant bit of b. In addition, each iteration of a loop subscripted by i, which varies between 1 and m&#x2212;n+1, involves a partial division of a word A of n bits of number a by number b in order to obtain one bit of quotient q. According to the invention, the same operations are performed with each iteration, regardless of the value of the quotient bit obtained. In different embodiments of the invention, one of the following is also performed with each iteration: the addition and subtraction of number b to/from word A; the addition of number b or a complementary number /b of b to word A; or a complement operation at 2of an updated datum (b or /b) or a dummy datum (c or /c) followed by the addition of the datum updated with word A.

Integer division method secure against covert channel attacks

A method for the secure application of a cryptographic algorithm of the RSA type in an electronic component obtains the value of a public exponent e from a given set of probable values, without a priori knowledge of that value. Having determined the value for the public exponent e, the application of countermeasures using the value of e, to block error attacks and side channel attacks, particularly of the DPA and SPA type, are carried out on the application of a private operation of the cryptographic algorithm.

Method of securely implementing a cryptography algorithm of the RSA type, and a corresponding component

The invention concerns a method for implementing in an electronic component a cryptographic algorithm using calculating means. The invention is characterized in that it consists in carrying out the following steps: a) selecting a value e among a specific number of values e, ebeing integers, b) checking if everifies a predetermined relationship: if so, then e=e, and storing e for use in calculating said cryptographic algorithm.

Method of implementing in an electronic component a cryptographic algorithm for finding the public exponent

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Gemenos, France

Karine Villegas