International Business Machines Corporation

Morton International, Inc.

Infineon Ag

Karen Lynne Holloway

James M Harper

Thomas Y Kwok

Robert C Wong

Richard Anthony Conti

Michael Jay Shapiro

Jonathan Daniel Chapple-Sokol

Uwe Schroeder

Rangaswamy Srinivasan

Andrew Lu

Samuel E Blum

Timothy J Wiltshire

Roger J Yerdon

Qiang Wu

Kurt Alan Tallman

Paul F Seidler

Alexander L Martin

Holly A LaFerrara

Ben C Hui

Martin E Powell

Ravi Kanjolia

Gabriela Brase

A method and apparatus includes an integrated circuit device, and at least one alignment mark on the integrated circuit device, the alignment mark comprises a first coded region, a second coded region adjacent the first coded region, and a third coded region adjacent the second coded region, the second coded region located between the first coded region and the third coded region, and markings on the first coded region and the third coded region being identical.

Method for providing rotationally symmetric alignment marks for an alignment system that requires asymmetric geometric layout

An alignment mark structure for use upon a semiconductor substrate is disclosed. In an exemplary embodiment, the alignment mark structure includes a plurality of segments arranged in an alignment pattern, with each of the plurality of segments being formed from a base pattern created on the substrate. The base pattern includes a plurality of sizes, wherein each of the plurality of sizes of the base pattern is repeated throughout an entire length of each of the plurality of segments.

Process-robust alignment mark structure for semiconductor wafers

An interconnection pattern is formed over the surface of a silicon wafer in which both the vias and the trenches of the pattern are filled with copper. The process of filling the vias and trenches involves use of a silicon nitride film as an etch stop and the filling of the vias with an anti-reflection coating.

'Via first' dual damascene process for copper metallization

Described herein is a method for selectively enlarging vias connecting two different layers of conductors in a semiconductor device. Whether or not an individual via is extended on each of its edges is determined by the distance of the edge to the neighboring features. Since many vias can be selectively enlarged along one or more edges without infringing upon neighboring structures, via integrity and conductive characteristics are improved.

Variable data compensation for vias or contacts

Titanium and/or tantalum nitrides or nitride silicides are deposited onto a substrate by chemical vapor deposition of a titanium and/or tantalum silylamido complex.

Method for depositing a titanium or tantalum nitride or nitride silicide

A method for providing vias, lines and other recesses in VLSI interconnection structures with copper alloys to create a thin layer of an oxide of an alloying element on the surface of the deposited alloy and on portions of the alloy which are in contact with an oxygen containing dielectric is disclosed. The present invention is also directed to VLSI interconnection structures which utilize this copper alloy and thin oxide layer in their vias, lines and other recesses. The oxide layer eliminates the need for diffusion barrier and/or adhesion layers and provides corrosion resistance for the deposited copper alloy. VLSI devices utilizing this copper alloy in the vias, lines and other recesses interconnecting semiconductor regions, devices and conductive layers on the VLSI device are significantly improved.

Copper alloy metallurgies for VLSI interconnection structures

A method is described for photoetching polyimides efficiently, and without the need for any chemical development steps. At least 1000.ANG. of the polyimide are removed by irradiation of the polyimide with ultraviolet radiation having wavelengths less than 220 nm. To enhance the process, the power density of the radiation is greater than about 60 mJ/cm.sup.2. The presence of an atmosphere containing oxygen enhances the etch rate, although photoetching will occur in other atmospheres.

Patterning of polyimide films with far ultraviolet light

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Poughkeepsie, NY, United States of America

Karen Lynne Holloway