Trw Limited

Karen E Yokoyama

Gershon Akerling

Steven W Fornaca

Paul S Lee

Moshe Sergant

Bill H Quon

A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of the chip and the surface of the substrate over the metal layers, to form a pattern of electrically conductive bumps having spongy and dendritic properties, placing the chip in aligned contact with the substrate where each electrically conductive chip bump mates with each corresponding electrically conductive substrate bump, and selectively applying heat and pressure to the chip and substrate causing each chip bump to fuse together with each corresponding substrate bump to form an electromechanical bond.

Method for forming high frequency connections to high temperature superconductor circuits and other fragile materials

A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.

Reworkable microelectronic multi-chip module

A method of calibrating gains and offsets for a two-dimensional detector array 10 comprising individual detector elements 14, including: (a) focusing a first incoming image signal at a first power level onto the detector array 10; (b) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the first power level; (c) for each detector element 14, translating the first incoming image signal by a detector element distance onto an adjacent detector element; (d) reading the corresponding electrical signal from the detector elements 14 as a second image frame at the first power level; (e) focusing a second incoming image signal at a second power level onto the detector array 10; (f) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the second power level; (g) for each detector element 14, translating the second incoming image signal by a detector element distance onto an adjacent detector element; (h) reading the corresponding electrical signals from the detector elements 14 as a second image frame at the second power level; (i) selecting a reference detector element 18; (j) determining the gain of detector elements adjacent to the reference detector element 18; and (k) determining the offset of the adjacent detector elements 14.

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Rancho Palos Verdes, CA, United States of America

Karen E Yokoyama