Semiconductor Components Industries, LLC

Karel Ptacek

Tomas Tichy

Richard Burton

Roman Stuler

Joel Turchi

Antonin Rozsypal

Frantisek Sukup

Radim Mlcousek

Jaroslav Knop

Juan Carlos Pastrana

Dhruv Chopra

Jiri Bubla

Jaromir Uherek

Jan Grulich

Roman Radvan

Signal converters, systems for power conversion, and methods for adaptive pulse control. The signal converter includes a pulse generator, a level shifter, and a controller. The pulse generator is configured to receive an input control signal for a switch driver. The pulse generator is also configured to generate a set control signal based on the input control signal. The level shifter is configured to generate, based on the set control signal, an output control signal having a first amplitude greater than a second amplitude of the input control signal. The level shifter is also configured to send the output control signal to the switch driver. The controller is configured to detect a common mode transient at a node coupled to the switch driver. The pulse generator is further configured to increase a pulse width of the set control signal when the controller detects the common mode transient.

Adaptive pulse control for high-voltage level shifters

A driver is suitable for use with a gallium nitride (GaN) power stage, and includes a voltage regulator and a high side driver. The voltage regulator provides a boot voltage between first and second terminals thereof that varies within a range between a turn-on voltage of a GaN transistor, and a safe voltage limit between a gate and a source thereof throughout an active time of said GaN transistor. The high side driver has an input for receiving a high side drive signal, an output for coupling to said gate of said GaN transistor, a power supply terminal coupled to said first terminal of said voltage regulator, and a ground terminal for coupled to said second terminal of said voltage regulator.

Bootstrap clamp circuit and method

Operating a gate driver. At least one example is a method of operating the gate driver, the method comprising: de-asserting a drive-low terminal of the gate driver; starting a single timer within the gate driver; and after expiration of the single timer asserting a drive-high terminal of the gate driver responsive to assertion of an in-high terminal of the gate driver; and then de-asserting the drive-high terminal; starting the single timer; and after a second expiration of the single timer asserting the drive-low terminal responsive to assertion of an in-low terminal of the gate driver.

Method and system of operating a gate driver

Switching circuits, half-bridge power converters, and methods for operating a switching circuit including a switching transistor coupled to a load. The method includes applying, with a driver, a gate voltage to the switching transistor. The method also includes generating, with a feedback capacitor, a feedback current based on a change in a voltage sensed at a drain terminal of the switching transistor when the switching transistor turns on. The method further includes applying the feedback current to the driver to limit the gate voltage applied to the switching transistor. The method also includes adjusting, with a controller, a switching slew rate of the switching transistor by draining an amount of the feedback current.

Switching slew rate control for gate drivers

In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, an electrical component has a plurality of dopant regions formed in a semiconductor material, where the dopant regions include a plurality of dopant regions formed in a dopant region of the same conductivity type. A plurality of dopant regions of an opposite conductivity type are formed in corresponding dopant regions of the first conductivity type. A metallization system is formed over the semiconductor material, where a portion of the metallization system contacts the semiconductor material.

High voltage capacitor and method

A pull-down circuit includes a control circuit generating an activation signal in response to a supply voltage, a first reference voltage, and a feedback signal, and a charge pump configured to generate a control signal in response to the activation signal and control a switching device using the control signal. The switching device is a field-effect transistor (FET) and is coupled to a power switch and pulls down a voltage level of a gate of the power switch to prevent a premature turn-on of the power switch.

Output driver having pull-down capability

An illustrative embodiment of an integrated circuit configured for galvanically isolated signaling includes a transfer conductor carrying a modulated carrier signal. A floating transfer loop is electromagnetically coupled to the transfer conductor to receive the modulated carrier signal. The floating transfer loop includes a primary of a step-up transformer. A receiver is coupled to a secondary of the step-up transformer to receive the modulated carrier signal in an amplified, differential fashion, and to demodulate the modulated carrier signal to obtain a digital receive signal.

Galvanically-isolated signaling between modules with step-up transformer

A simple, fast, easily designed circuit for demodulating a PWM signal produces an output signal indicating a duty cycle of a received PWM signal. The circuit may include a low pass filter circuit to receive a Pulse Width Modulated (PWM) signal and produce a triangular signal, a track-and-hold circuit to receive the PWM signal and the triangular signal and produce a minimum and maximum signals corresponding to minimum and maximum values of the triangular signal during each cycle of the PWM signal, and an averaging circuit to receive the minimum signal and the maximum signal and produce, by averaging the values of the minimum signal and the maximum signal, the output signal.

Pulse width demodulator

A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.

Switching device control with second assertion of drive signal during conduction phase

In accordance with an embodiment, a method of manufacturing an electrical component that may include a high voltage capacitor that includes providing a semiconductor material of a second conductivity type in which first doped region of a first conductivity type is formed. A plurality of doped regions of the first conductivity type and a plurality of doped regions of the second conductivity type are formed in the first doped region. A first p-n junction is formed between first doped regions of the first and second conductivity types and a second p-n junction is formed between second doped regions of the first and second conductivity types. A metallization system is formed above the doped regions so that capacitors are formed by a parallel connection of a first metal layer to a polysilicon layer and the first metal layer to a second metal layer.

An output driver includes a switching device having a first node coupled to a gate of a power switch and pulling down a voltage level of the gate of the power switch to prevent a premature turn-on of the power switch. A pull-down circuit is coupled to the switching device and keeping the switching device from being turned on to prevent the premature turn-on of the power switch.

A method and synchronous rectifier controller uses minimum off and on time blanking to avoid switching the switching transistor at incorrect times responsive to transients in the current sense signal. The minimum off time timer is commenced only when the current sense signal is above a reset threshold, and is reset when the current sense voltage falls below the reset threshold. Resetting the minimum off time timer in this manner avoids false starts of the minimum off time timer due to transients and allows the SRC to properly synchronize with the conduction and blocking phases of rectifier operation.

Method and apparatus for self-synchronization of a synchronous rectifier

A power conversion circuit including an SR MOSFET is provided. A minimum off-time timer for the SR MOSFET is started. A voltage potential at a first terminal of the SR MOSFET is measured. The SR MOSFET is turned on after a rate of change over time of the voltage potential exceeds a first threshold and before the minimum off-time timer expires.

Current sense detection for synchronous rectification

Synchronous rectifier control with second assertion of drive signal during conduction phase

Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative multi-module integrated circuit comprises: a transmitter in a first module, the transmitter providing a modulated carrier signal; a receiver in a second module demodulating the modulated carrier signal; and a galvanically isolated signaling path that includes: a first integrated resonator in the first module and a second integrated resonator in the second module, the first and second integrated resonators being resonantly coupled to convey the modulated carrier signal from the transmitter to the receiver. An illustrative embodiment of a method for providing an integrated circuit with a connection terminal for galvanically isolated signaling comprises: equipping the integrated circuit with a transmitter or receiver of a modulated carrier signal; connecting a transfer conductor to the connection terminal; and resonantly coupling the transmitter or receiver to a transfer conductor to convey the modulated carrier signal between the transfer conductor and the transmitter or receiver.

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Roznov pod Radhostem, Czechia

Karel Ptacek