Sharp Kabushiki Kaisha Corporation

Laurel Machinery Co., Ltd.

Kaoru Yamamoto

Yasuyuki Ogawa

Kohhei Tanaka

Seiji Kaneko

Seiichi Uchida

Shigeyasu Mori

Yutaka Takamaru

Nobuhiko Ito

Yoshimitsu Yamauchi

Yasuhiro Sugita

Akihiro Oda

Tokihiro Yokono

Noritaka Kishi

Hiromi Katoh

Masanori Ohara

Noboru Noguchi

Ryo Yonebayashi

Shigetsugu Yamanaka

Daichi Nishikawa

Masahiro Tomida

Hiroyuki Ogawa

Naoki Ueda

Kazutoshi Kida

Tadayoshi Miyamoto

Shinji Yamagishi

Naru Usukura

Yuhji Yashiro

Hiroaki Shigeta

Noriaki Yamaguchi

In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. An emission driver that applies a light-emission control signal (EM) to each of a plurality of light-emission control lines includes a shift register formed of a plurality of unit circuits. The shift register generates a light-emission control signal (EM) to be applied to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECKto ECK) outputted from a display control circuit. The display control circuit stops the outputs of the plurality of light-emission control clock signals (ECKto ECK) throughout a current measurement period in which a current corresponding to the characteristic of the drive transistor is measured.

Display device and method for driving same

A display device includes a display control circuit configured to control a data-side drive circuit and a scanning-side drive circuit such that a drive period and a pause period alternate between one another. The display control circuit, in the pause period, such that voltage of corresponding data signal line is applied to first conduction terminal of drive transistor as bias voltage when light emission control transistor is in an off state and current corresponding to holding voltage of holding capacitor flows through display element when light emission control transistor is in an on state, causes the data-side drive circuit to output the bias voltage and apply the bias voltage to data signal lines and causes the scanning-side drive circuit to stop driving first scanning signal lines and selectively drive second scanning signal lines and selectively make light emission control lines inactive.

To make a frame size of a display device having an external compensation function smaller than those of the known display devices. Each of a plurality of unit circuits configuring a gate driver includes a first output control transistor including a second conduction terminal connected to a first output terminal-connected to another unit circuit and a control terminal connected to a first internal node, a second output control transistor including a second conduction terminal connected to a second output terminal configured to output an on level signal for at least a part of a monitoring period and a control terminal connected to a second internal node, and an output circuit control transistor including a first conduction terminal connected to the first internal node and a second conduction terminal connected to the second internal node. A potential to be applied to a control terminal of the output circuit control transistor is switched between a potential of a high level and a potential of a low level.

Display device

In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. A source driver includes an integration circuit that measures a current corresponding to the characteristic of a drive transistor. An emission driver applies a light-emission control signal to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. In a current measurement period, the flow of a current corresponding to the characteristic of the drive transistor into the integration circuit is stopped at an edge timing, which is a timing at which the level of at least one of the plurality of light-emission control clock signals (ECK1 to ECK4) changes.

A display device that includes pixel circuits, in each of which a plurality of types of transistors coexist, and that operates normally is implemented while suppressing an increase in processing cost. Each unit circuit includes a first control circuit (), a first output circuit (), and a second output circuit (). The first output circuit () includes a first output terminal () connected to a first scanning signal line; a P-type transistor (M) having a control terminal connected to a first internal node (N), a first conductive terminal to which a gate high potential (VGH) is provided, and a second conductive terminal connected to the first output terminal (); and a N-type transistor (M) having a control terminal connected to the first internal node (N), a first conductive terminal connected to the first output terminal (), and a second conductive terminal to which a gate low potential (VGL) is provided.

Display device including pixel circuits with different transistor types and method for driving same

The active matrix substrate includes a demultiplexer circuit disposed in a peripheral region. Unit circuits of the demultiplexer circuit each distribute a display signal from one signal output line to n source bus lines (n: two or greater). Each unit circuit includes n branch lines and n switching TFTs configured to perform individual on/off control of electrical connections of the branch lines to the source bus lines. The demultiplexer circuit includes a plurality of boost circuits each configured to boost a voltage applied to a gate electrode of a corresponding one of the switching TFTs. Each boost circuit includes: a set-and-reset unit configured to perform set operation of pre-charging a node connected to the gate electrode and reset operation of resetting the potential of the node at different timings; and a boost unit configured to perform boost operation of boosting the potential of the node pre-charged by the set operation.

Active matrix substrate and display device

With regard to a display device having an external compensation function, the occurrence of operational failure caused by off-leakage at a transistor is suppressed. A unit circuit configuring a gate driver is provided with a stabilization transistor including a control terminal, a first conduction terminal connected to a first internal node, and a second conduction terminal connected to a first control signal line, a stabilization circuit-configured to control a potential of the control terminal of the stabilization transistor-based on a potential of the first internal node, a first reset transistor including a control terminal, a first conduction terminal connected to a second output terminal, and a second conduction terminal connected to a first reference potential line, and a reset circuit configured to control a potential of the control terminal of the first reset transistor based on the potential of the first internal node.

An active matrix substrate is provided with a demultiplexer circuit. Each unit circuit of the demultiplexer circuit splits the display signal from a single signal output line to n source bus lines. Each unit circuit includes n branch lines and n switching TFTs. The demultiplexer circuit includes boost circuits configured to boost the voltage applied to the gate electrodes of the switching TFTs. Each boost circuit includes a set section that pre-charges a node connected to the gate electrode, a boost section that boosts the potential of the node pre-charged by the set section, and a reset section that resets the potential of the node. The demultiplexer circuit includes an equalizer circuit configured to perform charge sharing by electrically connecting a first node boosted by the boost section of a first boost circuit and a second node boosted by the boost section of a second boost circuit.

An active matrix substrate according to an embodiment of the present invention includes: a plurality of source bus lines provided on a substrate; a source driver disposed in a peripheral region; signal output lines each connected to a corresponding one of output terminals of the source driver; and a demultiplexer circuit disposed in a peripheral region. The demultiplexer circuit includes unit circuits each configured to distribute a display signal from one signal output line to n source bus lines (n is an integer larger than or equal to 2). Each unit circuit includes n switching TFTs configured to perform individual on/off control of electrical connections of the n branch lines to the n source bus lines. The n branch lines being connected to one signal output lines. The demultiplexer circuit further includes a plurality of boost circuits each configured to boost a voltage applied to a gate electrode of a corresponding one of the n switching TFTs.

Active matrix substrate including setting thin film transistor and resetting thin film transistor and display device including same

Provided is an active matrix substrate () that includes multiple pixel TFTs (), multiple gate wiring lines (GL) along which a scanning signal is supplied to the multiple pixel TFTs, multiple source wiring lines (SL) along which a display signal is supplied to the multiple pixel TFTs, a gate driver () that drives multiple gate wiring lines, and a source driver () that drives multiple source wiring lines. At least one of the gate driver and the source driver includes a current mirror circuit (). The current mirror circuit is configured with two oxide semiconductor TFTs (and) each of which includes an oxide semiconductor layer.

Active-matrix substrate and display device

An active matrix substrate includes a demultiplexer circuit arranged in a peripheral region. Each unit circuit in the demultiplexer circuit includes n switching TFTs. The demultiplexer circuit includes a boost circuit capable of boosting a voltage applied to a gate electrode of the switching TFT. The boost circuit includes a set unit configured to perform a set action, a boost unit configured to perform a boost action, and a reset unit configured to perform a reset action. The set unit includes a setting TFT including a drain electrode connected to the drive signal line and a source electrode connected to a node connected to the gate electrode of the switching TFT. When the set unit performs the set action, a first signal voltage is supplied from the drive signal line to the drain electrode of the setting TFT, and a second signal voltage higher than the first signal voltage is supplied to the gate electrode of the setting TFT.

Active matrix substrate and display device including demultiplexer circuit with reduced drive power

The display device includes drive circuitsprovided in correspondence to the gate lines, respectively, and alternately switches a scanning period for scanning the gate lines and a non-scanning period during one vertical scanning period. The drive circuitincludes netA(n), an output switching element Mconnected to netA(n), and a reset circuit R. The output switching element Mapplies a selection voltage to the gate line GLn. The potential of netA(n) changes between a first potential that is equal to or higher than a threshold voltage of the output switching element M, and a second potential that is lower than the first potential. In the drive circuitwherein a period while netA(n) thereof has the second potential overlaps with the non-scanning period, the reset circuit R resets the potential of netA(n) to the second potential, before the resumption of the scanning period after the non-scanning period.

Display device having driving circuitry with driving gate lines

Provided is a technique of causing less display irregularities to occur when the scanning of the gate lines is resumed in a display device in which the scanning of gate lines is performed intermittently. A display device includes a display panel, and a driving circuitry that includes a plurality of drive circuits for scanning gate lines. The driving circuitry alternately switches a scanning period in which the gate lines are scanned, and a non-scanning period in which the scanning of the gate lines is suspended, during one vertical scanning period, according to a control signal. Each driving circuitincludes a first switching element N that applies a selection voltage to the gate line; an internal line netA; a second switching element A that charges the internal line netA to a first potential; and a third switching element B that includes a drain electrode connected to the internal line netA, and a source electrode having a second potential that is lower than the first potential. a drive circuit corresponding one of the gate lines that is selected at start of the scanning period includes a charging circuit() which recharges the internal line netA of this drive circuit to a potential equal to or higher than the first potential, before the start of this scanning period.

An active matrix substrate includes a demultiplexer circuit arranged in a peripheral region, and a power source circuit configured to supply power source voltages at a plurality of levels to the demultiplexer circuit. The demultiplexer circuit includes a boost circuit configured to increase a voltage to be applied to a gate electrode of a switching TFT. The boost circuit includes a set up unit to be driven by a first drive signal to pre-charge a node coupled to the gate electrode, a reset unit to be driven by a second drive signal to reset a potential of the node, and a boost unit to be driven by a third drive signal to increase the potential of the node pre-charged by the set up unit. An amplitude of the first drive signal and an amplitude of the second drive signal are identical to each other. An amplitude of the third drive signal differs from the amplitudes of the first drive signal and the second drive signal.

A display device includes a display panel, and drive circuits sequentially scanning gate lines and supplied with any of M-phase (M: three or greater) drive signals having different phases and a first potential or a second potential (lower) at predetermined cycles. The drive circuit includes netA(n) whose potential changes by drive signal with the first/second potential as reference, and an output circuit switching a corresponding gate line to a selected/unselected state and including first output switch including a gate connected to netA(n+1) of a first drive circuit different from the drive circuit, a drain supplied with the drive signal, and a source connected to the gate line. Difference between the potential of netA(n+1) in case of switching the gate line to the unselected/selected state and the reference potential in netA(n+1) is equal to difference between the first and second potentials or greater.

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Osaka, Japan

Kaoru Yamamoto