Bae Systems Information and Electronic Systems Integration Inc.

General Electric Company

Biogen Idec Ma Inc.

Schilmass Co. L.l.c.

Kanin Chu

Pane-Chane Chao

Charles R Eddy, Jr

Theodore D Moustakas

Enrico Bellotti

Liberty L Gunter

Mark Philip D'Evelyn

Robert Actis

Robert J Lender, Jr

Nicole Andrea Evers

Bernard J Schmanski

Carlton T Creamer

Anthony A Immorlica

Dale M Brown

Daniel Charles Boire

Kirby B Nichols

Hong Lu

Gabriel R Cueva

Blair E Coburn

Sue May Jessup

Pane Chane Chao

Steve M Rajkowski

Techniques and architecture are disclosed for a method for making a custom circuit comprising forming a common wafer template, selecting at least two elements of the common wafer template to be chosen elements, and adding at least one metal layer to interconnect the chosen elements to form a circuit. The common wafer template includes a plurality of transistors, a plurality of resistors, a plurality of capacitors, and a plurality of bond pads. Final circuit customization of the common wafer template is accomplished by adding at least one metal layer that forms interconnects to passive and active elements in the template in order to complete the circuit.

Flexible impedance network system

A GaN on diamond wafer and method for manufacturing the same is provided. The method comprising: disposing a GaN device or wafer on a substrate, having a nucleation layer disposed between the substrate and a GaN layer; affixing the device to a handling wafer; removing the substrate and substantially all the nucleation layer; and bonding the GaN layer to a diamond substrate.

Method for gallium nitride on diamond semiconductor wafer production

A field effect transistor and method for making such a transistor is provided, the field effect transistor comprising: a gate layer stack comprising a layer of a first metal is disposed proximate to at least one layer of a second metal, wherein the first metal alloys with the second metal to form a shape memory alloy. The shape metal allow may be NiTi, and at the contact plane between the layers, the alloy is formed when the transistor is heated to an elevated temperature.

Field effect transistors with gate electrodes having Ni and Ti metal layers

In summary, a vertical metalized transition in the form of a via goes from the back side of a high thermal conductivity substrate and through any semiconductor layers thereon to a patterned metalized strip, with the substrate having a patterned metalized layer on the back side that is provided with a keep away zone dimensioned to provide impedance matching for RF energy coupled through the substrate to the semiconductor device while at the same time permitting the heat generated by the semiconductor device to flow through the high thermal conductivity substrate, through the back side of the substrate and to a beat sink.

Method and design of an RF thru-via interconnect

A high power amplifier architecture is disclosure. One example configuration includes a first plurality of distributed amplification stages operatively coupled in a first string. A conductive trace associated with the first string provides a stepped structure, such that the associated inductance successively decreases from input to output of the first string. A second plurality of distributed amplification stages is operatively coupled in a second string, and a conductive trace associated therewith provides a stepped structure, such that the associated inductance successively decreases from input to output of the second string. In one example case, each of the first and second strings comprises gallium nitride transistor amplification stages formed on silicon carbide. The module may further include a heat spreader material that thermally and electrically couples to the amplification stages. The conductive trace associated with one string can be shared with another string.

High power amplifier

A method for fabrication of a field effect transistor gate, with or without field plates, includes the steps of defining a relatively thin Schottky metal layer by a lithography/metal liftoff or metal deposition/etch process on a semiconductor surface. This is followed by depositing a dielectric passivation layer over the entire wafer and defining a second lithographic pattern coincident with or slightly inset from the boundaries of the previously defined metal gate layer. This is followed by etching the dielectric using dry or wet etching techniques and stripping the resist, followed by exposing and developing a third resist pattern to define the thicker gate metal layers required for electrical conductivity and also for the field plate if one is utilized. The final step is depositing gate and/or field plate metal, resulting in a gate electrode and an integral field plate.

Structure and method for fabrication of field effect transistor gates with or without field plates

An etched grooved GaN-based permeable-base transistor structure is disclosed, along with a method for fabrication of same.

GaN-based permeable base transistor and method of fabrication

A photodetector () comprising a gallium nitride substrate, at least one active layer () disposed on the substrate (), and a conductive contact structure () affixed to the active layer () and, in some embodiments, the substrate (). The invention includes photodetectors () having metal-semiconductor-metal structures, P-i-N structures, and Schottky-barrier structures. The active layers () may comprise GaAlInNPAs, or, preferably, GaAlN. The gallium nitride substrate comprises a single crystal gallium nitride wafer and has a dislocation density of less than about 10cm. A method of making the photodetector () is also disclosed.

Homoepitaxial gallium nitride based photodetector and method of producing

A photodetector comprising a gallium nitride substrate, at least one active layer disposed on the substrate, and a conductive contact structure affixed to the active layer and, in some embodiments, the substrate. The invention includes photodetectors having metal-semiconductor-metal structures, P-i-N structures, and Schottky-barrier structures. The active layers may comprise Ga Al In N P As , or, preferably, Ga Al N. The gallium nitride substrate comprises a single crystal gallium nitride wafer and has a dislocation density of less than about 10 cm . A method of making the photodetector is also disclosed.

A solid state optical spectrometer for combustion flame temperature determination comprises: a first photodiode device for obtaining a first photodiode signal, the first photodiode device comprising a silicon carbide photodiode and having a range of optical responsivity within an OH band; a second photodiode device for obtaining a second photodiode signal, the second photodiode device comprising a silicon carbide photodiode and a filter, the second photodiode device having a range of optical responsivity in a different and overlapping portion of the OH band than the first photodiode device; and a computer for obtaining a ratio using the first and second photodiode signals and using the ratio to determine the combustion flame temperature.

Growing community of inventors

Nashua, NH, United States of America

Kanin Chu