Applied Materials, Inc.

Kangzhan Zhang

Ajit P Paranjpe

Yuji Maeda

R Suryanarayanan Iyer

Sanjeev Tandon

Rubi Lapena

Embodiments of methods for fabricating a silicon nitride stack on a semiconductor substrate are provided herein. In one embodiment, a method for fabricating a silicon nitride stack on a semiconductor substrate includes depositing a base layer including silicon nitride on the substrate using a first set of process conditions that selectively control the stress of the base layer; and depositing an upper layer including silicon nitride using a second set of process conditions that selectively control at least one of an oxidation resistance and a refractive index of the upper layer.

Method of fabricating a silicon nitride stack

A CMOS gate stack that increases the inversion capacitance compared to a conventional CMOS gate stack has been described. Using a poly-SiGe gate, instead of the conventional poly-Si gate near the gate dielectric layer, increases the amount of implanted dopant that can be activated. This increase overcomes the polysilicon depletion problem that limits the inversion capacitance in the conventional CMOS gate stack. To integrate the poly-SiGe layer into the gate stack, a thin &#x3b1;-Si layer is deposited between the gate dielectric layer and the poly-SiGe layer. To ensure proper salicide formation, a poly-Si layer is capped over the poly-SiGe layer. In order to obtain a fined-grained poly-Si over poly-SiGe, a second &#x3b1;-Si layer is deposited between the poly-Si layer and the poly-SiGe layer.

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Fremont, CA, United States of America

Kangzhan Zhang