Honeywell G.m.b.h.

Kang W Lee

Robert L Rabe

Tho T Vu

A monolithic integrated circuit memory control operating through the use of MOS field-effect transistors with diode or bipolar circuit arrangement for the bit line column switching.

Read-only memory

An OR logic function is provided in at least two separate circuit branches by diodes in parallel summing current at a first logic node and a first circuit branch and diodes in parallel summing current at a second logic node in a second current branch. An AND logic function is performed at a third logic node by using additional diodes connected in parallel at the third logic node so as to share current passing through the third logic node, with the logic conditions at the first and second logic nodes serving as the inputs to the AND logic function. The logic condition at the third logic node is applied to the gate of a switching FET. The switching FET is conveniently employed to invert the logic condition at the third logic node. The invention is particularly suited for use with MESFET logic families using gallium arsenide (GaAs) substrates.

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Wayzata, MN, United States of America

Kang W Lee