Samsung Electronics Co., Ltd.

Postech Academy-industry Foundation

Kang-Min Lee

Sung-Jin Kim

Young-Kwon Yoon

Tae-Jin Kim

Jung-hyun Shim

Hyung-Rae Cho

Ji-Yong Yoon

Yong-Suk Moon

Yong-Gu Lee

Yong-Suk Lee

Noh-Sun Kim

Jae-Young Huh

Kyung-Ha Lee

Jin-Woo Roh

Dong-Churl Kim

Yun-Ju Kwon

Jong-Chan Park

Hyun-geun Jo

Young-eun Lee

Won-Jung Kim

Jung-Hun Park

Sung-Joo Yoo

Tae-hong Park

Sun-mi Jin

Ho-Seung Lee

Jeong-Rok Park

Dong-Ku Han

Jong-Hyuck Hong

Hyuk-Chan Park

Min-su Kang

Hung-Kee Kim

Gi-Ppeum Choi

Ji-Hyeon Kweon

Jung-Hyun Shim

Seok-Min Oh

Jae-Keun Na

A method for generating an interrupt signal in a memory controller and supporting a multi-processor is provided. Whether an access for a determined memory region occurs is determined. When the access for the determined memory region occurs, whether the access for the determined memory region has a right is determined. When the access for the determined memory region has the right, a core that will generate an interrupt signal is determined. The determined core is requested to generate the interrupt signal.

Apparatus and method for generating interrupt signal that supports multi-processor

An apparatus and method for controlling a low-voltage memory in a mobile communication system are provided. The apparatus includes a memory for storing data including at least one error caused by a low-voltage, and an error correction unit for identifying whether the at least one error exists in the memory according to a first bit set in a local buffer of an error correction code storage, for comparing location information on the error data read from the memory and location information on error data of at least one protection set in the local buffer of the error correction code storage when it is determined that the at least one error exists in the memory, for generating an error correction code as a result of the comparison, and for correcting the error data of the memory according to the error correction code.

Apparatus and method for controlling memory in mobile communication system

An apparatus and a method for scaling a dynamic bus clock are provided. The apparatus for scaling the dynamic bus clock includes at least one master module, at least one slave module, a bus for delivering data transmitted and received by the at least one master module and the at least one slave module, a bus frequency controller for determining a bus clock frequency by considering activity information of the at least one master module, and a clock generator for generating the frequency as determined by the bus frequency controller and providing the generated frequency to the at least one master module, the at least one slave module, and the bus.

Apparatus and method for scaling dynamic bus clock

An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.

Apparatus and method for adaptive frequency scaling in digital system

A digital camera capable of variably setting a frame rate may include an imaging device which outputs a plurality of temporally continuous image frames when photographing a moving image. The digital camera may also include a digital signal processor that determines a frame rate with which the image frames are filed, wherein the digital signal processor variably determines the frame rate according to a motion speed of a subject in the frames. The digital camera may further include a recording medium in which the filed image frames are stored. Accordingly, as the frame rate is varied according to the motion of a subject, the motion of the subject can be smoothly realized in a high motion speed section from a reproduction perspective, and substantially repeated image frames can be removed in a low speed motion section. Thus, the size of moving image files can be reduced, saving memory resources.

Digital camera having a variable frame rate and method of controlling the digital camera

A portable communication apparatus is configured to perform a method for power control of a Central Processing Unit (CPU) in a portable communication apparatus. The portable communication apparatus for power control of the CPU includes a CPU configured to report an operation status of the CPU and an overhead determiner. The CPU is also configured to change a power control level according to control of the overhead determiner. The overhead determiner is configured to determine an overhead of the CPU and to control the power control level of the CPU based on the overhead of the CPU.

Apparatus and method for a power control in a system using an embedded CPU

An apparatus and a method for controlling a power in a Network on Chip (NoC) are provided. The apparatus includes a storage for storing status information of links interconnecting processing elements (PEs), link configuration information for establishing paths between the PEs, and voltage and clock information of the links according to a bandwidth; and a control device for establishing paths between the PEs to transmit data by checking the link configuration information in the storage, and controlling the voltage and the clock of the links by determining the voltage and the clock of the links of the established paths according to a bandwidth required for the data transmission of the PEs.

Apparatus and method for controlling voltage and frequency in network on chip

An apparatus and method for dynamically controlling a clock signal in a pipeline system are provided. In the apparatus and method, a clock generator outputs the clock signal at every period, a PDR is included with each stage for outputting information about a processing speed of each stage, and a CCU controls the delay of the clock signal using the processing time of each stage received from the PDR and providing the clock signal with the controlled delay to a register between stages. Accordingly, the clock signal is dynamically controlled to provide higher operating speeds.

Apparatus and method for dynamic clock control in a pipeline system

Disclosed is a photographing apparatus using an infrared ray in a portable terminal, the apparatus includes: a camera module for photographing an image; a display unit for providing a preview for the image photographed by the camera module; and an infrared sensor unit for determining if light is obstructed by emitting and receiving an infrared ray through an infrared sensor upon photographing by the camera module, and outputting a photographing signal for the image.

Photographing method and apparatus using an infrared sensor to control plural camera functions

A digital photographing apparatus including an imaging device configured to continuously output image data of a subject in units of frames according to a predetermined drive clock, during consecutive photographing; a buffer memory configured to store a plurality of image frames output by the imaging device; a memory checking unit configured to detect a data overflow of the buffer memory; a digital signal processor configured to perform an overriding operation of sacrificing previously stored frame data and storing image frames recently obtained after the data overflow occurs in the buffer memory in replacement of the sacrificed framed data; and a recording medium configured to store the image frames in the buffer memory in the form of files.

Photographing apparatus for supporting overriding mode and method of controlling same

A method and a system for transmitting/receiving serial data efficiently by minimizing the transitions of bits in a serial communication system, as well as a serial communication system for the same, are provided. The method for converting coded parallel data into serial data and transmitting the serial data in a serial communication system includes determining a position, in which an information bit of the coded parallel data is found first, the information bit being defined as a bit having a predetermined bit value so that the information bit is not compressed; and serially transmitting the information bit found first and at least one bit following the information bit found first as compressed serial data until the determined position is reached.

Method and system for transmitting/receiving serial data in serial communication system and serial communication system for the same

Apparatus and method are disclosed for selecting a transmit antenna diversity scheme according to a variation speed of a fading channel in a mobile communication system. A user equipment (UE) estimates a channel response of a pilot channel by receiving a pilot channel signal from a Node B; estimates a variation speed of a fading channel by using the estimated channel response and determining a transmit antenna diversity scheme suitable to the variation speed of the fading channel; and transmits feedback information including the determined transmit antenna diversity scheme to the Node B, so that the Node B can determine a transmit antenna diversity scheme for a channel signal to be transmitted to the UE based on the transmit antenna diversity scheme information included in the feedback information. In this way, the Node B adaptively applies a transmit antenna diversity according to a channel condition.

Adaptive transmit antenna diversity apparatus and method in a mobile communication system

Growing community of inventors

Suwon-si, South Korea

Kang-Min Lee