Seiko Instruments & Electronics Ltd.

Kaneo Yamaguchi

Shinya Watanabe

Kenichi Matsushima

Fumihiro Tanaka

Yoshio Shimada

A color hard copy apparatus converts an analog video signal of a still picture frame displayed on a color graphic display into binary video data to obtain a multicolor gradation picture. A single analog-to-digital converter samples the analog video signal a plurality of times at respectively different threshold levels, each threshold level being maintained constant during the sampling of the entire picture frame, to convert the analog video signal into corresponding binary video data. The binary video data are written in a picture memory at predetermined write-in addresses according to a predetermined multicolor gradation picture program, such as an organized dither program or a density pattern, and the binary video data are read out of the picture memory according to the predetermined multicolor gradation picture program to obtain binary picture data signals for use in printing a high-quality multicolor gradation picture corresponding to the desired picture frame displayed on the color graphic display.

Color hard copy apparatus having simplified analog-to-digital conversion

A recording apparatus receives a video signal containing a horizontal sync signal and a data signal comprised of a given number of image bit data arranged within each horizontal scanning period, and stores the number of image bit data in synchronization with the horizontal sync signal. A voltage-controlled oscillator produces in synchronization with the horizontal sync signal a frequency signal having a frequency higher than that of the sync signal. A divider frequency-divides the frequency signal by a given factor to produce a number of sampling pulses corresponding to the given number of image bit data. A data sampling circuit receives the data signal for sampling therefrom the number of image bit data in response to the corresponding sampling pulses to thereby write the image bit data into memory. Another divider frequency-divides the frequency signal by the product of the given factor and the given number to produce a feedback signal. A comparator compares the phase of the feedback and sync signals with each other to produce a control signal effective to maintain the VCO to continuously produce the frequency signal synchronized with the horizontal sync signal.

Sampling clock generation circuit of video signal

A hard copy system regulatively processes a video signal with a settable regulatory parameter to produce regulated picture information which is reproducible as a hard copy. A multiplexer receives a plurality of video signals having different signal forms to selectively apply one of the video signals to the hard copy system. A memory stores a plurality of different regulatory parameters assigned to the respective video signals and determined according to the different signal forms thereof so as to optimize the regulative processing thereof. A controller operates when a selected video signal is processed for retrieving from the memory a regulatory parameter assigned to the selected video signal to set the retrieved regulatory parameter to thereby enable the hard copy system to produce optimally regulated picture information.

Hard copy system controllable by channel discrimination signal

An interface circuit of video signal hard copy apparatus for optimizing a phase of a sampling clock to an image signal. A delayed signal of a video sync signal is employed for a reference input signal of a sampling clock generation circuit. The delay quantity of the video sync signal is arbitrarily set by a control circuit. The delay quantity corresponding to the point of change of sampled data is detected by a CPU circuit according to the sequential comparison with some of the sampled data of an image signal in the plural delay quantities. A stable sampling can be attained even for a high frequency video signal exceeding 100 MHz by setting the optimum delay quantity according to the detected delay quantity.

Interface circuit of video signal hard copy apparatus

A sampling clock phase correction circuit of video signal to keep stably a phase of a sampling clock to an image signal. A delayed signal of a video sync signal is employed for a reference signal of a sampling clock generation circuit. The delay quantity of the video sync signal is controlled to sample stably the video image signal according to the comparison and discrimination of a phase relation between a sampling clock signal and a video sync signal by a phase detection circuit and a CPU circuit. A precise phase correction where a characteristic change of circuit elements by a temperature drift or the like is compensated can be attained even for a high frequency video signal exceeding 100 MHz.

Growing community of inventors

Tokyo, Japan

Kaneo Yamaguchi