Renesas Electronics Corporation

Sony Corporation

Sony Computer Entertainment Inc.

Kan Murata

Hideyuki Noda

Hiroyuki Yamasaki

Masaru Haraguchi

Provided is a signal processing circuit occupying a small circuit area. A common arithmetic operation element is shared between a plurality of arithmetic operation sequence control units. An arbitration circuit selects, when the plurality of arithmetic operation sequence control units simultaneously generate requests for arithmetic operations to use the common arithmetic operation element, the predetermined sequence control unit based on priority information about the plurality of arithmetic operation sequence control units, causes the common arithmetic operation element to execute the arithmetic operation requested from the selected arithmetic operation sequence control unit, and returns the result of the arithmetic operation to the selected arithmetic operation sequence control unit.

Signal processing circuit

Disclosed is a data processing device capable of efficiently performing an arithmetic process on variable-length data and an arithmetic process on fixed-length data. The data processing device includes first PEs of SIMD type, SRAMs provided respectively for the first PEs, and second PEs. The first PEs each perform an arithmetic operation on data stored in a corresponding one of the SRAMs. The second PEs each perform an arithmetic operation on data stored in corresponding ones of the SRAMs. Therefore, the SRAMs can be shared so as to efficiently perform the arithmetic process on variable-length data and the arithmetic process on fixed-length data.

Data processing device and data processing method thereof

A method for distributing a task to plural processors is provided. A distribution rule of distributing plural tasks to sub processors or the main processor, respectively, is previously written in a program code of an application configured to include plural tasks. At the time of executing the application, the main processor reads out the distribution rule, and distributes plural tasks to the sub processors or the main processor, respectively, in accordance with the distribution rule.

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Kanagawa, Japan

Kan Murata