Intel Corporation

Agere Systems Inc.

Kamran Azadet

Meng-Lin Yu

Joseph Williams

Jian-Guo Chen

Leilei Song

Steven Pinault

Parakalan Venkataraghavan

Thomas Truman

David T Dougherty

Systems, methods, and apparatuses relating to a user defined formatting instruction to configure multicast Benes network circuitry are described. In one embodiment, a processor includes a decoder to decode a single instruction into a decoded single instruction, the single instruction having fields that identify packed input data, packed control data, and a packed data destination; and an execution unit to execute the decoded single instruction to: send the packed control data to respective control inputs of a circuit that comprises an inverse butterfly circuit coupled in series to a butterfly circuit, wherein the inverse butterfly circuit comprises a first plurality of stages of multicast switches and the butterfly circuit comprises a second plurality of stages of multicast switches, read, once from storage separate from the circuit, each element of the packed input data as respective inputs of the circuit, route the packed input data through the circuit according to the packed control data, and store resultant packed data from the circuit into the packed data destination.

Apparatuses, methods, and systems for a user defined formatting instruction to configure multicast Benes network circuitry

A data structure, method and protocol wherein synchronization data indicative of a data frame delineation point is inserted within an inter-packet gap (IPG) proximate a data frame during transmission. Optionally, a cyclical redundancy check (CRC) length indicative data, pointer data, and other data is inserted within the IPG to further insure appropriate delineation of data frames within a data stream.

Simple link protocol providing low overhead coding for LAN serial and WDM solutions

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San Ramon, CA, United States of America

Kamran Azadet