Silicor Materials Inc.

Silicon Magnetic Systems

Calisolar Inc.

Cypress Semiconductor Corporation

Other

Spawnt Private S.a.r.l.

Berlinsolar Gmbh

Kamel Ounadjela

Fritz Kirscht

Matthias Heuer

Dieter Linke

Martin Kaes

Vera Abrosimova

Jean Patrice Rakotoniana

Eugene Youjun Chen

Alain Paul Blosse

Anis Jouini

Witold Kula

Peter G Borden

Benjamin C E Schwarz

Abdallah Nouri

Jean Patrice Rakotoniaina

Marcin Walerysiak

Andreas Kraenzl

Sam G Geha

Ashish Pancholy

Christian Bauch

Rumen Deltschew

Frederick B Jenne

Gerd Lippold

Thoralf Gebel

Chang Ju Choi

Biju Parameshwaran

Seyed-Javad Mohsseni-Ala

Chunhui Zhang

Helen L Chung

Omar Sidelkheir

Jerome S Wolfman

Thoral Gebel

The present invention relates to an apparatus and method for purifying materials using a fractional solidification. Devices and methods shown provide control over a temperature gradient and cooling rate during fractional solidification, which results in a material of higher purity. The apparatus and methods of the present invention can be used to make silicon material for use in solar applications such as solar cells.

Silicon purification mold and method

The present invention relates to an apparatus and method for purifying materials using a rapid directional solidification. Devices and methods shown provide control over a temperature gradient and cooling rate during directional solidification, which results in a material of higher purity. The apparatus and methods of the present invention can be used to make silicon material for use in solar applications such as solar cells.

Directional solidification system and method

The invention describes a process for removing nonmetallic impurities from metallurgical silicon. A melt is produced from metallurgical silicon and halide-containing silicon. As a result, the impurities are sublimed out and removed from the melt in the form of nonmetal halides. Compared with the known process, in which gaseous halogen is blown through an Si melt, the novel process can be carried out in a particularly simple and efficient manner.

Process for removing nonmetallic impurities from metallurgical silicon

Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides semiconductor predominantly of a single type (p-type or n-type) for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of boron, phosphorus, aluminum and/or gallium. The process further melts the silicon feedstock with the boron, phosphorus, aluminum and/or gallium to form a molten silicon solution from which to perform directional solidification and maintains the homogeneity of the resistivity of the silicon throughout the ingot. A balanced amount of phosphorus can be optionally added to the aluminum and/or gallium. Resistivity may also be measured repeatedly during ingot formation, and additional dopant may be added in response, either repeatedly or continuously.

Method and system for controlling resistivity in ingots made of compensated feedstock silicon

Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.

Method and system for forming a silicon ingot using a low-grade silicon feedstock

Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. A common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, including increased material strength and improved electrical properties. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells.

Germanium enriched silicon material for making solar cells

A quality control process for determining the concentrations of boron and phosphorous in a UMG-Si feedstock batch is provided. A silicon test ingot is formed by the directional solidification of molten UMG-Si from a UMG-Si feedstock batch. The resistivity of the silicon test ingot is measured from top to bottom. Then, the resistivity profile of the silicon test ingot is mapped. From the resistivity profile of the silicon test ingot, the concentrations of boron and phosphorous of the UMG-Si silicon feedstock batch are calculated. Additionally, multiple test ingots may be grown simultaneously, with each test ingot corresponding to a UMG-Si feedstock batch, in a multi-crucible crystal grower.

Quality control process for UMG-SI feedstock

A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes an active region located on the front surface of the substrate, formed for example by a phosphorous diffusion step. The back surface includes a doped region, the doped region having the same conductivity as the substrate but with a higher doping level. Contact grids are formed, for example by screen printing. Front junction isolation is accomplished using a laser scribe.

Bifacial solar cells with back surface doping

Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered. Multicrystalline semiconductor wafers having grain boundaries with impurities may also undergo the annealing and gettering of dispersed defects to the grain boundaries, further increasing the semiconductor substrate purity levels.

Semiconductor wafer pre-process annealing and gettering method and system for solar cell formation

A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes an active region located on the front surface of the substrate, formed for example by a phosphorous diffusion step. After removing the PSG, assuming phosphorous diffusion, and isolating the front junction, dielectric layers are deposited on the front and back surfaces. Contact grids are formed, for example by screen printing. Prior to depositing the back surface dielectric, a metal grid may be applied to the back surface, the back surface contact grid registered to, and alloyed to, the metal grid during contact firing.

Bifacial solar cells with overlaid back grid surface

Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.

Germanium-enriched silicon material for making solar cells

Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 &#x3a9;cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium. Adding phosphorus becomes mandatory at very low resistivity, typically close to 0.2 &#x3a9;cm and slightly below.

Methods for patterning a magnetic cell junction and a topography used for and/or resulting from such methods are provided. In particular, a method is provided which includes etching portions of a topography adjacent to a patterned photoresist layer to a level within a cap film of the topography, removing etch residues from the topography and subsequently etching the remaining portions of the cap film to expose an uppermost magnetic layer. Another method is provided which includes patterning a dielectric mask layer above a patterned upper portion of a magnetic cell junction and ion milling a lower portion of the magnetic cell junction in alignment with the mask layer. An exemplary topography which may result and/or may be used for such methods includes a stack of layers having a dual layer cap film arranged above at least two magnetic layers spaced apart by a tunneling layer.

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Belmont, CA, United States of America

Kamel Ounadjela