Avago Technologies International Sales Pte. Limited

Broadcom Corporation

Kambiz Vakilian

Jingguang Wang

Jing Wang

Vikrant Dhamdhere

Robert Roze

Afshin Momtaz

Jan Roelof Westra

Dmitrii A Loukianov

Disclosed herein are implementations of a hybrid network for use in a full duplex communication system. In one aspect, the hybrid network includes a first circuit coupled between an output of a communication channel and a shared output of a transmitter and the communication channel, a second circuit coupled between a first output of the transmitter and the shared output, a third circuit coupled between the shared output and an input of an amplifier, a fourth circuit coupled between the input of the amplifier and a second output of the transmitter, and a fifth circuit coupled between an output of the amplifier and the input of the amplifier. In some embodiments, the output of the amplifier is coupled to an input of a receiver.

Capacitive hybrid with PGA for full duplex transceivers

The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.

System for and method of cancelling a transmit signal echo in full duplex transceivers

In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.

Method and apparatus for integrated battery supply regulation and transient suppression

A system for controlling the impact of process and temperature in passive signal detector includes a voltage level detector, a first transistor with a drain electrically connected to a first input of the voltage level detector, and a second transistor with a drain electrically connected to a second input of the voltage level detector. The first transistor has a threshold voltage of a first voltage value. The threshold voltage corresponds to a minimum gate-to-source voltage to create a conducting path between source and drain terminals of a transistor. The second transistor has a threshold voltage of the first voltage value. An offset voltage is applied across a gate of the first transistor and a source of the second transistor, and applied across a gate of the second transistor and a source of the first transistor. A difference between a threshold voltage and the offset voltage is constant.

System and method for controlling the impact of process and temperature in passive signal detector for automotive ethernet

A system and method includes a power control circuit for controlling first power from a power supply provided to a first circuit includes a first stage and a second stage. The first stage includes a low power energy detector and a first power switch. The low power energy detector is configured to provide second power via the first switch in response to energy. The second stage includes a signal detector configured to detect a characteristic of a signal associated with the energy in response to the second power. The signal detector is configured have the first power provided to the first circuit in response to the characteristic being detected.

Two stage power control system for automotive devices

The performance of an AGC loop typically depends on several factors, including gain linearity of the VGA and variation in the VGA bandwidth over the range of available gain settings. Although a resistively degenerated VGA provides for excellent gain linearity and immunity to process variations, the conventional architecture for a resistively degenerated VGA suffers from bandwidth variation over the range of available gain settings. Embodiments are provided herein of a constant-bandwidth VGA that utilizes resistive degeneration. To maintain a constant bandwidth over the range of available gain settings, degeneration resistors are coupled in parallel with compensation capacitors. In an embodiment, a compensation capacitor is determined to have a capacitance substantially equal to the decrease in total degeneration resistance that occurs as a result of an associated degeneration resistor being placed in parallel with the total degeneration resistance.

Constant-bandwidth variable gain amplifier

A closed-loop circuitry includes, in part, a loop filter and a current source/sink coupled to the loop filter to adjust the phase/frequency of the signal generated by the closed-loop circuitry. Because the voltage generated by the loop filter has a relatively low frequency, the current source/sink is operable at a relatively low frequency. Each current source and current sink may be a current digital-to-analog (DAC). The amount of current sourced into or sunk out of the loop filter by the current DAC is varied by setting the associated bits of a multi-bit signal. If the closed-loop circuitry is differential, a current source is coupled to the loop filter adapted to receive the differentially high signal, and a current source is coupled to the loop filter adapted to receive the differentially low signal.

Growing community of inventors

Irvine, CA, United States of America

Kambiz Vakilian