Gte Automatic Electric Incorporated

Scientific-atlanta, Inc.

Kamal I Parikh

Stig E Magnusson

Sergio E Puccini

Nathaniel Simmons

Samuel H Russ

Ajith N Nair

James Eugene Cannella, Jr

Tareq K Hassan

Robert A Saluski

Steve J Hoskins

A reconfigurable connectorization panel assembly for a circuit board housing rack or chassis, particularly suitable for use in cable television (CATV) headend equipment. Each circuit module for use in the rack has an associated rear panel assembly or 'connectorization panel' that bolts onto the rear side of a chassis which supports the rack and a backplane. The connectorization panels extend plug-action connectors through openings in the rear panel of the chassis and in the backplane, and mate with corresponding connectors on the circuit modules. On the rear side, the connectorization panels provide appropriate drop side connectors required for input/output signal cabling. The connectorization panel adapts a particular slot in the chassis for a particular type of input/out cabling and connectors. The slot can be reconfigured for a different type of circuit module by affixing a different type of connectorization panel.

Connectorization panel assembly for circuit board housing rack

An arrangement for interfacing the originating time stage (OTS) and terminating time stage (TTS) of a time and control unit (TCU) to the space stage of T-S-T digital switching system. The space stage includes an intra-path through the space stage as well as an interpath. The interface transmits PCM samples simultaneously from the OTS to both the intra and interpaths of the space stage. PCM samples from the space stage are received by an intra buffer and an inter buffer from the intra path and inter path respectively. A TCU control memory gates and connects either the intra buffer or inter buffer to the TTS.

Arrangement for interfacing the space stage to the time stages of a

A cross-copy arrangement is shown for synchronizing parity clock signals in a duplex digital system. Each copy of the duplex system generates a local timing signal and a remote timing signal. The remote signal of each copy is crossed over and logically combined with the local timing signal generating a parity clock signal.

Cross-copy arrangement for synchronizing error detection clock signals

An interface arrangement is shown compensating for timing delays during transmission of communication information between a transmitting and receiving stage of a T-S-T digital switching system. The arrangement includes a buffer at the receiving stage having first and second storage files. During a first time slot communication information is written in the first file using control signals transmitted along with the communication information while simultaneously the second file is read using a local control signal. In the subsequent time slot the second file is written to and the first file is read, providing a one time slot slip between the transmitting and receiving stages.

Interface arrangement for buffering communication information between a

A space stage for a T-S-T digital switching system is shown arranged into modular functional elements. The elements are combined allowing the space stage to grow modularly to interconnect from one to thirty-two originating time stages and terminating time stages.

Modular space stage arrangement for a T-S-T digital switching system

A space stage for a T-S-T digital switching system is shown arranged to interconnect the originating time stages (OTS) and terminating time stages (TTS) of a first time group and the OTS's and TTS's of a second time group. The space stage includes four identical space stage units (SSU). The first SSU interconnects the OTS's and TTS's of the first time group and the second SSU the OTS's and TTS's of the second time group. The third SSU interconnects the OTS's of the first time group to the TTS's of the second time group and the fourth SSU interconnects the OTS's of the second time group to the TTS's of the first time group.

Space stage arrangement for a T-S-T digital switching system

An arrangement for the distribution of digital service tones in a distributed processor digital switching network is shown. These service tones are distributed between the time stages of the digital switching network with a minimum of interprocessor communication. This is accomplished by transmitting the particular service tone, from the terminating time stage which detects the need for tone application, through the switching network paths already established for voice communication. These service tones include such tones as reorder tone, dial tone, busy tone, DTMF tones, MF tones and ringback tone.

Growing community of inventors

Phoenix, AZ, United States of America

Kamal I Parikh