Western Digital Technologies, Inc.

Kalpit Bordia

Raghavendra Gopalakrishnan

Ramanathan Muthiah

Gautam Ashok Dusija

Ramkumar Ramamurthy

Vinayak Bhat

Sridhar Prudviraj Gunda

Disha Gundecha

Pradeep Sreedhar

Raviraj Raju

Bhanushankar Doni Gurudath

Prashanth Reddy Enukonda

Sachin Krishna Kudva

Ashim Ranjan Saikia

Aspects of a storage device are provided that optimize stream oriented writing of sequential data streams for improved read and write performance. The storage device includes a non-volatile memory including a plurality of blocks, and a controller configured to receive a plurality of host write commands each including a sequential data stream. In response to determining the host write commands include sequential data streams, the controller writes each of the sequential data streams respectively to different sequential open blocks, where the blocks are respectively associated with the sequential data streams. The controller may afterwards read each of the sequential data streams respectively from the different blocks. As a result, sequential data from multiple streams may not be stored in a mixed pattern in a same sequential block, thereby allowing the controller to issue fewer read or relocate commands in a block for a given sequential data stream.

Stream oriented writing for improving sequential write and read performance

Aspects of a storage device provide an optimized data relocation scanning process which significantly reduces a number of page reads performed during a block relocation scan by consolidating logical addresses for multiple FMUs in a single FMU. The storage device includes a memory comprising a block including pages and FMUs, and a controller that is configured to store, in one of the FMUs, logical addresses for multiple FMUs. The controller is further configured, in response to a data relocation command, to read the logical addresses from the FMU, to determine at least one of the read logical addresses is mapped to a current FMU in a L2P mapping table, and to relocate data stored at the valid logical addresses in response to the determination. As a result, latency and power consumption associated with data relocation may be significantly reduced and storage device performance may thus be improved.

Smart relocation scan optimization

The present disclosure generally relates to using irregular MetaBlocks (IRMBs) in both host and control pools. The IRMBs are used to ensure efficient wear leveling. Blocks in the control pool are swapped with blocks in the host pool upon exceeding a program-erase count (PEC) threshold. Additionally, the swapping algorithm for IRMBs can be used to ensure an efficient recovery from an ungraceful shutdown (UGSD) event.

Method of handling irregular MetaBlock wear leveling and UGSD boot time improvement

A storage system has a memory with a multi-level cell (MLC) block that can store multiple bits per cell or can be constrained to store only one bit per cell. Using the MLC block to store only one bit per cell can increase the performance of the storage system but can also reduce endurance of the MLC block. The storage system can monitor a command queue to determine the performance needed. With that information, the storage system can determine whether it is worth making the tradeoff of increasing performance at the cost of endurance.

Storage system and method for using a queue monitor in a block allocation process

A storage system has a memory with a multi-level cell (MLC) block and a partially-bad single-level cell (SLC) block. The storage system repurposes the partially-bad SLC block as a non-volatile read cache for data stored in the MLC block (e.g., cold data that is read relatively frequently) to improve performance of host reads. Because the original version of the data is still stored in the MLC block, the original version of the data can be read if there is an error in the copy of the data stored in the partially-bad SLC block, thus avoiding the need for extensive error-correction handling to account for the poor reliability of the partially-bad SLC block.

Method and storage system with a non-volatile bad block read cache using partial blocks

Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.

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Bengaluru, India

Kalpit Bordia