Freescale Semiconductor,inc.

Nxp Usa, Inc.

Kai Yun Yow

Poh Leng Eu

Chee Seng Foong

Lan Chu Tan

Wai Yew Lo

Meng Kong Lye

Boon Yew Low

Navas Khan Oratti Kalandar

You Ge

Ly Hoon Khoo

Wen Shi Koh

Penglin Mei

Zi Song Poh

Yuan Zang

Jian Wen

Alexander M Arayata

Tzu Ling Wong

Bihua He

A 'universal' substrate for a semiconductor device is formed of a non-conductive substrate material. A uniform array of conductive pillars is formed in the substrate material. The pillars extend from a top surface of the substrate material to a bottom surface of the substrate material. A die flag may be formed on the top surface of the substrate material. Pillars underneath the die flag are connected to pillars beyond a perimeter of the die flag with wires. Power and ground rings may be formed by connecting rows of pillars that surround the die flag.

Substrate interconnections for packaged semiconductor device

A universal substrate for assembling ball grid array (BGA) type integrated circuit packages has a non-conducting matrix, an array of conducting vias extending between top and bottom surfaces of the matrix, and one or more instances of each of two or more different types of fiducial pairs on the top surface of the matrix. Each instance of each different fiducial pair indicates a location of a different via sub-array of the substrate for a different BGA package of a particular package size. The same substrate can be used to assemble BGA packages of different size, thereby avoiding having to design a different substrate for each different BGA package size.

Universal BGA substrate

A patterned, non-conductive substrate for an integrated circuit (IC) package has a die side configured to receive a die and a lead side opposite the die side. A pattern formed in the substrate defines openings (e.g., holes, steps, grooves, and/or cavities) that extend between the die side and the lead side of the substrate. In the IC package, the openings are filled with conductive material (e.g., solder) that supports electrical connections between bond pads on the die and leads formed from the conductive material. The substrate can be used to form a relatively inexpensive, quad flat no-lead (QFN) IC package without using a metal lead frame and without bond wires.

IC device having patterned, non-conductive substrate

A method of assembling semiconductor devices with semiconductor dies of alternative different configurations uses the same substrate panel. The dies of the selected configuration are placed in an array, mounted, and connected to internal electrical contact pads on a first face of the panel using main fiducial markings and an array of subsidiary fiducial markings corresponding universally to arrays of semiconductor dies of the different alternative configurations. The pitch of the subsidiary fiducial markings is equal to the spacing between adjacent rows of the internal electrical contact pads on the panel and is a sub-multiple of the pitch of the array of dies.

Substrate for alternative semiconductor die configurations

A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.

Semiconductor package with stress relief and heat spreader

A packaged semiconductor device has an integrated circuit (IC) die and a heat spreader. The heat spreader has a first portion with holes formed entirely therethrough. The first portion is attached to the die using thermally-conductive adhesive that fills the holes. The holes enable the heat spreader to be attached to the die without placing excess pressure on the IC die that could cause the die to crack.

Semiconductor device with die attached heat spreader

A semiconductor package has a substrate with a solder mask layer, and upper and lower surfaces. Conductive traces and electrical contacts are formed on the substrate, and vias are formed in the substrate to electrically connect the conductive traces and electrical contacts. A semiconductor die is attached on the upper surface of the substrate. A mold cap is formed on the upper surface of the substrate and covers the die and the conductive traces. The mold cap includes a mold body having clipped corners and extensions that extend from each of the clipped corners. The extensions and clipped corners help prevent package cracking.

Mold cap for semiconductor device

A semiconductor package includes a lead frame, a semiconductor die, bond wires providing an electrical connection between the die and the lead frame, and a mold compound that encapsulates the lead frame, the die and the bond wires. The lead frame includes spaced apart first and second frame members each having an inner peripheral edge and an opposing outer peripheral edge, spaced apart lead pads disposed between the inner peripheral edges of the first and second frame members, and conductive leads disposed proximate to the outer peripheral edge of each of the first and second frame members. The die is mounted on the lead pads.

Lead frame for semiconductor package with enhanced stress relief

A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions.

Semiconductor sensor device with over-molded lid

A method of assembling a pressure sensor device includes providing a substrate having a plurality of substrate connection pads. A pressure sensor die is attached to a first major surface of the substrate and bond pads of the pressure sensor die are electrically connected to the respective substrate connection pads. A retractable cavity pin is placed on the first major surface of the substrate such that the cavity pin covers the pressure sensor die and the electrical connections to the die. A molding compound is then dispensed onto the first major surface of the substrate such that the molding compound surrounds the pressure sensor die and the cavity pin. The cavity pin is retracted such that a cavity is formed around the pressure sensor die and a gel material is dispensed within the cavity such that the gel material fills the cavity and covers the pressure sensor die.

Method of assembling pressure sensor device

A lead frame for providing electrical interconnection to an Integrated Circuit (IC) die. The lead frame includes a die support area for receiving and supporting the IC die and a plurality of leads surrounding the die support area. A plurality of interconnect receiving portions is formed in the die support area. The interconnect receiving portions are for providing electrical interconnection to first bumps on a bottom surface of the IC die. The leads are for providing electrical interconnection to second bumps on a surface of the IC die, the second bumps surrounding the first bumps.

Lead frame for semiconductor package

A self monitoring vehicle braking system includes multiple sensors that gather data associated with the braking system. The data includes wheel speed, road inclination, moisture associated with a surface of the braking system, and audio associated with the road. A processor receives the data from the sensors and processes the data to determine whether a condition of the braking system falls within defined limits and provides to the driver of the vehicle an indication of the braking system condition.

Self monitoring braking system for vehicles

A semiconductor substrate includes a substrate layer and a circuit film formed over the substrate layer. One or more openings are formed in the circuit film and the substrate layer. Conductive plates are formed over the circuit film at the peripheries of the openings. A semiconductor die is attached to the circuit film, below the openings with an adhesive material. A conductive material is disposed in the openings to electrically connect the semiconductor die to the conductive plates.

Semiconductor substrate and method of connecting semiconductor die to substrate

An integrated circuit package includes an integrated circuit diehaving a plurality of optical elementssensitive to and/or capable of generating light, whereby data communication to circuitry of the integrated circuit die can be effected using a data channels implemented using the plurality of elements. The data channels are along optical pathways provided by an adapter unitmounted on a PCBThe adapter unitforms the optical pathways between optical fibersand the respective optical elementThus, there is no requirement to implement expensive wire-bonding as part of the packaging process.

Growing community of inventors

Petaling Jaya, Malaysia

Kai Yun Yow