Qualcomm Incorporated

Nanome, Inc.

Kai Wang

Narendranath Malayath

Marta Karczewicz

Shu Lin

Yiliang L Bao

Atul Garg

Sanjeev Kumar

Raghavendra Nagaraj

Toshiaki Yoshino

Shu Xiao

Mang Li

Vadim Seregin

Wei-Jung Chien

Xianglin Wang

Geert Van Der Auwera

Jamie Menjay Lin

Hsiao-Chiang Chuang

Yang Zhou

Xue Hai Fang

Yen-Chi Lee

Jian Wei

Feng Ge

Sumit Mohan

Yasutomo Matsuba

Ling Feng Huang

Hariharan Ganesh Lalgudi

Zhen Liu

Steven Robert McCloskey

Raghavendra C Nagaraj

Vincent Brunet

Hari Ganesh Thirunageswaram

Dimensional decomposition convolution systems and techniques are described. A system receives a tensor including a first number of dimensions. The system processes a variant of the tensor using a convolution function including a second number of dimensions to generate a processed tensor. The first number of dimensions is greater than the second number of dimensions. A plurality of dimensions from the first number of dimensions of the tensor are grouped into a dimension of the variant of the tensor to reduce dimensionality of the variant of the tensor to the second number of dimensions.

Systems and methods for recursive dimensional decomposition convolution

Systems, methods, and computer-readable media are provided for efficient video coding. An method can include determining, during a first coding stage implemented at a first frame rate, first motion vectors for a first subset of frames in a sequence of frames; determining, during a second coding stage, second motion vectors for a second subset of frames in the sequence of frames, wherein a portion of the second motion vectors is calculated based on one or more of the first motion vectors; and reconstruct, during the second coding stage, the first subset of frames using the first motion vectors; and reconstruct, during the second video coding stage, the second subset of frames using the second motion vectors, the first coding stage and the second coding stage being implemented in parallel, and the second coding stage being implemented at a second frame rate that is higher than the first frame rate.

Efficient video encoder architecture

A device includes a first bitstream engine and a second bitstream engine. The first bitstream engine is configured to decode a first portion of a first video frame of a plurality of video frames to generate first decoded portion data. The first bitstream engine is also configured to generate synchronization information based on completion of decoding the first portion. The second bitstream engine is configured to, based on the synchronization information, initiate decoding of a second portion of a particular video frame to generate second decoded portion data. The second bitstream engine uses the first decoded portion data during decoding of the second portion of the particular video frame. The particular video frame includes the first video frame or a second video frame of the plurality of video frames.

Video processing using multiple bitstream engines

System that generates the solvent-excluded surface (SES) of a molecule using a parallel algorithm that may execute on a GPU. Parallel execution allows a SES to be created in seconds even for a large protein, or to be recreated rapidly when exploring modifications to molecular structure. The algorithm calculates a spatial field that represents a signed distance between an atom-facing surface of a probe and each point in 3D grid. Spatial field calculations for different grid points may be performed in parallel. The SES is then obtained as the zero isosurface of the spatial field, using for example marching cubes. Atoms and probes may be placed into spatial buckets and indexed by bucket to improve efficiency by limiting calculations to atoms and probes in the proximity of a point.

System that rapidly generates a solvent-excluded surface

Video pixel line buffers are widely used for data processing in video codecs. Video data may be packed into buffers configured to store a plurality of words, each word comprising a series of bits. The video data may be associated with two or more channels. In order to reduce realization costs, data blocks from two different channels may be packed from opposite sides of a word in the buffer in opposite directions. In some embodiments, data blocks from two or more physical channels may be mapped to two or more virtual channels, the virtual channels having balanced data block sizes. The data blocks associated with the virtual channels may then be packed to one or more buffers.

Channel line buffer data packing scheme for video codecs

An apparatus configured to filter video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information comprising at least two adjacent video blocks, each video block comprising a plurality of video samples, and each video sample having a bit depth. The processor determines a filtered video sample based at least in part on a video sample and an adjustment value. The processor determines the adjustment value at least in part from an input with a limited bit depth. The input is determined from a set of one or more video samples, and its bit depth is limited such that it is less than the bit depth of the one or more video samples.

Deblocking filter with reduced line buffer

Implementations include video image processing systems, methods, and apparatus for integrated video downscale in a video core. The downscaler computes and writes a display frame to an external memory. This frame may have the same resolution as a target display device (e.g., mobile device). The target display device then reads this display frame, rather than the original higher resolution frame. By enabling downscale during encoding/decoding, the device can conserve resources such as memory bandwidth, memory access, bus bandwidth, and power consumption associated with separately downscaling a frame of video data.

Integrated downscale in video core

The techniques of this disclosure are generally related to parallel coding of video units that reside along rows or columns of blocks in largest coding units. For example, the techniques include removing intra-prediction dependencies between two video units in different rows or columns to allow for parallel coding of rows or columns of the video units.

Sub-block level parallel video coding

A device employing techniques to optimize Context-based Adaptive Binary Arithmetic Coding (CABAC) for the H.264 video decoding is provided. The device includes a processing circuit operative to implement a set of instructions to decode multiple bins simultaneously and renormalize an offset register and a range register after the multiple bins are decoded. The range register and offset registers may be 32 or 64 bits. The use of a larger range register allows renormalization to be skipped when enough bits are still in the range register.

H.264 video decoder CABAC core optimization techniques

The motion estimation techniques and video encoding device(s) described use a two dimensional pipeline to generate accurate motion estimation parameters for a current video block. The two dimensional pipeline uses previously calculated motion estimation parameters of relevant neighboring video blocks, including a preceding video block on a same row as the current video block, prior to the generation of the accurate motion vectors, motion vector predictors, and mode decision of the current video block. The use of the two dimensional pipeline allows accurate motion vector prediction from neighboring video blocks previously not available, in the computation of motion vectors. Three engines may be used in the two dimensional pipeline, a fetch engine, an integer search engine and a fractional and spatial search engine. While the fetch engine and fraction and spatial search engine operate on one row, the integer search engine operates on another row.

Multi-dimensional neighboring block prediction for video encoding

The subject matter of this specification can be implemented in, among other things, a method of decoding video data that includes decoding compressed input video data using a first entropy coding technique to obtain first decoded data. The method further includes re-encoding the first decoded data using a second entropy coding technique that is different from the first entropy coding technique to obtain re-encoded data. The method further includes storing the re-encoded data in a storage device. The method further includes decoding the re-encoded data using the second entropy coding technique to obtain second decoded data.

Two-stage entropy decoding

An apparatus performs efficient coding techniques to more efficiently determine an availability of neighboring video data units determined for the current video data unit. The apparatus comprises an availability determination unit that maintains an availability counter. The availability determination unit determination unit increments the availability counter after each of the plurality of video data units are processed and determines, based on the availability counter, whether one or more of the plurality of video data units (i) have been previously processed and (ii) are available for use as neighboring video data units in the processing of a current one of the plurality of video data units video data units. The apparatus further processes the current video data unit based on the determination of whether one or more of the neighboring video data units are available.

Determining availability of video data units

An embodiment is directed to a method for selecting a predictive macroblock partition from a plurality of candidate macroblock partitions in motion estimation and compensation in a video encoder including determining a bit rate signal for each of the candidate macroblock partitions, generating a distortion signal for each of the candidate macroblock partitions, calculating a cost for each of the candidate macroblock partitions based on respective bit rate and distortion signals to produce a plurality of costs, and determining a motion vector from the costs. The motion vector designates the predictive macroblock partition.

Video encoding

Techniques for optimizing the Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream decoding are disclosed. In one configuration, a device has a first processing circuit operative to decode a Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream into an intermediate signal having a CABAC decoded standard format and a decoded order. A second processing circuit decodes the intermediate signal using a non-CABAC decoding standard. A buffer is provided between the first and second processing circuits to improve processing speeds.

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San Diego, CA, United States of America

Kai Wang