National Chi Nan University

Kai-Siang Lan

Yo-Sheng Lin

Jin-You Liao

Bo-Shun Chen

A power divider includes an input capacitor, and first and second transmission lines (TLs). The first TL includes an input portion (IP), a transmission portion (TP) and an output portion (OP). The second TL includes a TP and an OP. The IP is for receiving an input signal, and is connected to the TPs of the first and second TLs. For each of the first and second TLs, the TP has a length that is one-twelfth of a target wavelength, and is connected to the OP. The OPs of the first and second TLs are for cooperatively outputting a pair of output signals which are in-phase and each of which has a frequency equal to that of the input signal. The input capacitor is connected between ground and the IP.

Power divider

A power divider/combiner includes a first transmission line that includes a first part and a second part, and a second transmission line and a third transmission line that are electromagnetically coupled with the first transmission line. The first part, the second part, the second transmission line and the third transmission line are each of a particular length. The first part, the second transmission line and the third transmission line are respectively connected to a first port, a second port and a third port for inputting/outputting signals having a target wavelength equal to four times the particular length.

Power divider/combiner

A down-conversion mixer includes a converting-and-mixing circuit and a load circuit. The converting-and-mixing circuit performs voltage to current conversion and mixing with a differential oscillatory voltage signal pair upon a differential input voltage signal pair to generate a differential mixed current signal pair. The load circuit includes two transistors each having a transconductance that varies according to a control voltage, two resistors each decreasing a threshold voltage of a respective one of the transistors, and a resistor-inductor circuit cooperating with the transistors to convert the differential mixed current signal pair into a differential mixed voltage signal pair.

Down-conversion mixer

A power divider includes two transmission lines (TLs), two capacitors and a resistor. Each TL has a first terminal, a second terminal, and a length that is 0.07 to 0.12 times an operation wavelength in the power divider. The TLs establish electromagnetic coupling therebetween. The first terminals of the TLs are connected together, and are to receive an input signal. One of the capacitors is connected to a common node of the TLs. The other capacitor and the resistor are connected in parallel between the second terminals of the TLs. The second terminals of the TLs are to respectively provide two output signals which are in-phase, and each of which has a frequency equal to that of the input signal.

A power divider/combiner includes a first transmission line (TL) and two second TLs. The first TL has a first terminal that is for receiving or outputting a signal with a target wavelength, and a second terminal that is open circuited. Each of the second TLs is disposed adjacent to and spaced apart from the first TL so as to establish electromagnetic coupling therebetween. Each of the second TLs has a first terminal, and a second terminal that is distal from the first terminal of the first TL. The second terminals of the second TLs are for cooperatively outputting or receiving a pair of signals that have the target wavelength and that are in-phase. Each of the first and second TLs has a length that is a quarter of the target wavelength.

An injection locked frequency divider includes: a resonator circuit including first to fourth inductors; and a mixer circuit receiving an input signal with an input frequency. Each of the third and fourth inductors is coupled between a respective one of the first and second inductors and the mixer circuit. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around three times the free-running frequency and within which the input frequency falls. By at least performing mixing with a differential reference signal pair, the mixer circuit generates, based on the input signal, a differential mixed signal pair with a frequency that is one-third the input frequency.

Injection locked frequency divider

A down-conversion mixer includes a converting-and-mixing module and a load module. The converting-and-mixing module performs voltage-to-current conversion and mixing with first and second differential oscillatory voltage signal pairs upon a differential input voltage signal pair to generate first and second differential mixed current signal pairs. The load module includes two RL circuits and a negative resistance providing circuit that cooperate to convert the first and second differential mixed current signal pairs into first and second differential mixed voltage signal pairs. Each RL circuit includes two variable resistors, and an inductor connected between the variable resistors.

A down-conversion mixer includes a converting-and-mixing module and a load module. The converting-and-mixing module performs voltage-to-current conversion and mixing with a differential oscillatory voltage signal pair upon a differential input voltage signal pair to generate a differential mixed current signal pair. The load module includes a first transistor, a second transistor and a resistor-inductor (RL) circuit that cooperatively convert the differential mixed current signal pair into a differential mixed voltage signal pair. Each of the first and second transistors has a transconductance that varies according to a control voltage.

An N-way RF power amplifier device includes a power divider, multiple first power amplifier circuits, multiple second power amplifier circuits, and a power combiner. The power divider divides an RF input signal into multiple differential signal pairs each including complementary first and second division signals. The first power amplifier circuits amplify the first division signals and the second power amplifier circuits amplify the second division signals in such a way that the amplified first division signals and the amplified second division signals have the same phase. The power combiner combines the amplified first and second division signals into an RF output signal.

Power amplifier device

A frequency divider includes a signal injection circuit and an oscillating circuit. The signal injection circuit includes a transistor of which a gate receives an input signal with an input frequency, a drain and a source cooperatively provide a first differential signal pair, and a body receives a biasing voltage. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around N times the free-running frequency and within which the input frequency falls. The tank circuit generates a second differential signal pair that is related to the first differential signal pair and that has an oscillating frequency which is one-Nthe input frequency.

A multi-order wave voltage controlled oscillator (VCO) includes a power impedance matching unit, a signal transmitting unit, a harmonic wave eliminating unit and an oscillation frequency adjusting unit. The power impedance matching unit includes an input end, an output end and a first transmission line between the input end and the output end. The first transmission line is a &#xbc;-wavelength transmission line based on a wavelength of an output harmonic wave. The signal transmitting unit includes multiple upper inductor electrically connected to the output end and multiple lower inductors electrically connected to a ground end. The harmonic wave eliminating unit includes multiple transistors electrically connected to the signal transmitting unit and each having a drain electrically connected to a gate of the adjacent transistor to form a multi-order ring loop. The oscillation frequency adjusting unit includes multiple varactors.

Multi-order wave voltage controlled oscillator

An RF transceiver front-end circuit includes an antenna, a first transceiving switch, a reception processing unit, a transmission processing unit and a transmission unit. The reception processing unit includes a low-noise amplifier, a first variable gain amplifier at a back-end circuit of the low-noise amplifier, and a first phase shifter at a back-end circuit of the first variable gain amplifier, wherein a phase of the first variable gain amplifier is constant. The transmission processing unit includes a power amplifier, a second phase shifter at a front-end circuit of the power amplifier, and a second variable gain amplifier at a front-end circuit of the second phase shifter, wherein a phase of the second variable gain amplifier is constant. The transmission unit includes a transmission line and a plurality of passive phase adjustors controlled to change a phase shifting angle of a signal on the transmission line.

Radio-frequency transceiver front-end circuit

A voltage controlled oscillator includes a resonance unit, coupling unit and source degeneration unit. The resonance unit includes two first inductors and two first variable capacitors. The first inductor is electrically connected to the first variable capacitor. The coupling unit includes a first transistor and a second transistor. Power supply input terminals of the first and second transistors are electrically connected to the resonance unit. The source degeneration unit includes two adjustable inductors, two fourth inductors and two second variable capacitors. The adjustable inductors are connected to power supply output terminals of the first and second transistors, respectively. The second variable capacitor is electrically connected to the adjustable inductor and the fourth inductor, wherein equivalent inductance of the adjustable inductor is adjusted, such that input impedance looking in the direction away from the resonance unit from the power supply input terminal is featured by negative capacitance.

Voltage controlled oscillator

A wireless sensor includes a wireless power module, a sensor module generating a sensor output, an analog-to-digital converter (ADC) module connected to the sensor module, a wireless transceiver (TRX) module operating in a receiving state by default to receive an RF input signal, transmitting an RF output signal based on digital signals when in a transmitting state, and switching back to the receiving state after a period, and a processing module connected to the ADC and TRX modules, activating the ADC module to convert the sensor output to the digital outputs when the TRX module is in the receiving state, and when receiving the digital signals, deactivating the ADC module and switching the TRX module to the transmitting state.

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Nantou, Taiwan

Kai-Siang Lan