Taiwan Semiconductor Manufacturing Comp. Ltd.

Kai-Hsiung Chen

Chih-Ming Ke

Po-Chung Cheng

Yang-Hung Chang

Yen-Liang Chen

Hung-Chih Hsieh

Chun-Ming Hu

Kuei-Shun Chen

Yu-Ching Wang

Long-Yi Chen

Jia-Hong Chu

Hsin-Chin Lin

Meng-Wei Chen

Kai Wu

Chi-Wen Lai

Chia-Ching Liang

Weimin Hu

Tsai-Sheng Gau

Hua-Tai Lin

Wen-Zhan Zhou

Jia-Rui Hu

Chen-Shien Chen

Heng-Jen Lee

Ho-Yung David Hwang

Chi-Kang Chang

Yih-Shung Lin

Yean-Zhaw Chen

Yung-Chih Chang

Yai-Yei Huang

Ching-Pin Kao

Hsiang-Yu Su

Yun-Heng Tseng

Chih-Mihg Ke

Methods of fabricating and using an overlay mark are provided. In some embodiments, the overlay mark includes an upper layer and a lower layer disposed below the upper layer. The lower layer includes a first plurality of compound gratings extending in a first direction and disposed in a first region of the overlay mark, each of the first plurality of compound gratings including one first element and at least two second elements disposed on one side of the first element, and a second plurality of compound gratings extending the first direction and disposed in a second region of the overlay mark, each of the second plurality of compound gratings including one third element and at least two fourth elements on one side of the third element. The first plurality of compound gratings is a mirror image of the second plurality of compound gratings.

Overlay marks for reducing effect of bottom layer asymmetry

A method for performing DBO measurements utilizing apertures having a single pole includes using a first aperture plate to measure X-axis diffraction of a composite grating. In some embodiments, the first aperture plate has a first pair of radiation-transmitting regions disposed along a first diametrical axis and on opposite sides of an optical axis that is aligned with a center of the first aperture plate. Thereafter, in some embodiments, a second aperture plate, which is complementary to the first aperture plate, is used to measure Y-axis diffraction of the composite grating. By way of example, the second aperture plate has a second pair of radiation-transmitting regions disposed along a second diametrical axis and on opposite sides of the optical axis. In some cases, the second diametrical axis is substantially perpendicular to the first diametrical axis.

Aperture design and methods thereof

The present disclosure provides a system. The system includes a metrology tool configured to collect overlay errors from a patterned substrate; and a controller module coupled to the metrology tool and configured to generate an overlay compensation from the collected overlay errors, wherein the generating of the overlay compensation includes identifying a portion of the overlay errors as a set of outliers, identifying inside the set of outliers overlay errors not due to reticle effects, thereby creating a set of noise, excluding the set of noise from overlay errors, thereby creating a set of filtered overlay errors, and calculating the overlay compensation based on the set of filtered overlay errors.

Noise reduction for overlay control

A spectroscopic overlay metrology system and corresponding spectroscopic overlay metrology methods are disclosed herein for improving overly measurement accuracy, optimizing overlay recipes, and/or minimizing (or eliminating) asymmetry-induced overly error from overlay measurements. An exemplary method includes generating a diffraction spectrum by an overlay target from incident radiation having more than one wavelength. The diffraction spectrum includes a plurality of positive ordered diffracted beams and a plurality of negative ordered diffracted beams that are separated by wavelength, such that the diffraction spectrum includes more than one wavelength of a positive order and a negative order. The method further includes collecting intensity information associated with the diffraction spectrum generated by the overlay target from the incident radiation, and generating overlay information from the collected intensity information, where the overlay information includes contributions from asymmetry-induced overlay error. In some implementations, the method includes optimizing an overlay recipe based on the generated overlay information.

Spectroscopic overlay metrology

A method includes selecting a group of wafers, each of the wafers having a resist pattern; selecting a group of fields for each of the wafers; selecting one or more points on each of the fields; measuring overlay errors on the resist pattern at locations associated with the one or more points selected on the respective wafers; and generating a combined overlay correction map based on measurements of the overlay errors on the wafers. At least one of the selecting of the group of wafers, the selecting of the group of fields, and the selecting of the one or more points is based on a computer-generated model.

Method and system for overlay control

A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion, and the first strip portion and the second strip portion are elongated in a first elongated axis and are spaced apart from each other. The method includes forming a layer over the first overlay grating. The layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion.

Method for forming semiconductor device structure with overlay grating

A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The method includes forming a layer over the first overlay grating. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion, the third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other, there is a second distance between a third sidewall of the third strip portion and a fourth sidewall of the fourth strip portion, the third sidewall faces away from the fourth strip portion, the fourth sidewall faces the third strip portion, the first distance is substantially equal to the second distance, and the first trench extends across the third strip portion and the fourth strip portion.

The present disclosure provides a method. The method includes patterning a substrate by a patterning tool; collecting a plurality of overlay errors from a plurality of fields on the substrate; identifying noise from the plurality of overlay errors by applying a first filtering operation and a second filtering operation that is different from the first filtering operation. The method further includes grouping the plurality of overlay errors that are not identified as noise into a set of filtered overlay errors; calculating an overlay compensation based on the set of filtered overlay errors; and performing a compensation process to the patterning tool according to the overlay compensation.

A method for overlay monitoring and control is introduced in the present disclosure. The method includes selecting a group of patterned wafers from a lot using a wafer selection model; selecting a group of fields for each of the selected group of patterned wafers using a field selection model; selecting at least one point in each of the selected group of fields using a point selection model; measuring overlay errors of the selected at least one point on a selected wafer; forming an overlay correction map using the measured overlay errors on the selected wafer; and generating a combined overlay correction map using the overlay correction map of each selected wafer in the lot.

A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion. The method includes forming a first layer over the first overlay grating. The first layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the first layer. The second overlay grating has a third strip portion and a fourth strip portion. The third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other.

A metrology target of a semiconductor device is provided. The metrology target includes a substrate including first and second layers. The first layer includes a first grating, a second grating, and a first dummy structure. The first dummy structure is at least formed between the first grating and the second grating. The second layer is formed over the first layer and includes a third grating and a fourth grating. The first, second, third and fourth gratings are formed based on the first spatial period. The third grating and fourth grating are placed to overlap the first grating and second grating, respectively. The first grating and the third grating are formed with a first positional offset which is along a first direction. The second grating and the fourth grating are formed with a second positional offset which is along a second direction which is opposite to the first direction.

Growing community of inventors

Taipei, Taiwan

Kai-Hsiung Chen