Yangtze Memory Technologies Co., Ltd.

Kai Han

Zhipeng Wu

Lu Zhang

Bo Xu

Hang Yin

Chuan Yang

Simin Liu

Yali Guo

Zi Yin

Liuqun Xie

Jingjing Geng

Xiangning Wang

Meng Xiao

Pan Wang

Hui Zhang

Aspects of the disclosure provide a method for fabricating a semiconductor device having an first stack of alternating insulating layers and sacrificial word line layers arranged over a substrate, the first stack including a core region and a staircase region. The method can include forming a first dielectric trench in the core region of the first stack, forming a second dielectric trench that is adjacent to and connected with the first dielectric trench in the staircase region of the first stack, and forming dummy channel structures extending through the first stack where the dummy channel structures are spaced apart from the second dielectric trench.

Method of forming top select gate trenches

A plurality of holes are formed extending vertically in a first dielectric deck that includes interleaved a plurality of first sacrificial layers and a plurality of first dielectric layers over a substrate. A plurality of sacrificial structures are formed in the holes. A second dielectric deck is formed having interleaved a plurality of second sacrificial layers and a plurality of second dielectric layers over the first dielectric deck. A slit opening is formed extending in the second dielectric deck, the slit opening aligned with and over the sacrificial source contact structures. The sacrificial structures are removed through the slit openings such that the slit opening is in contact with the holes to form a slit structure. A plurality of conductor layers are formed in the first and second dielectric decks through the slit structure, forming a memory stack. A source contact structure is formed in the slit structure.

Three-dimensional memory device having adjoined source contact structures and methods for forming the same

A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.

Memory device and fabrication method thereof

Embodiments of structure and methods for forming a memory device are provided. In an example, a memory device includes a substrate, a stack above the substrate, a channel structure, and a source contact structure each extending vertically through the memory stack. The source contact structure includes (i) a plurality of first source contact portions each extending vertically and laterally separated from one another and (ii) a second source contact portion extending vertically over and in contact with the plurality of first source contact portions, the second source contact portion being laterally continuous.

A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.

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Wuhan, China

Kai Han