Chinese Academy of Sciences

Huawei Technologies Co., Limited

Air-sys Refrigeration Engineering Technology (beijing) Co., Ltd

Novashin Co., Ltd.

Nova Advanced Materials Co., Ltd

Kai Han

Dapeng Chen

Wenwu Wang

Xiaolei Wang

Shijie Chen

Chunjing Xu

Yunhe Wang

Yunshui Chen

Xuming Fang

Yaguo Ma

Chao Zhao

Huaxiang Yin

Jiang Yan

Hong Yang

Chuanjian Liu

Jianchun Yang

Hanting Chen

Dongmei Yang

Xueli Ma

Han Shu

Rongxin Zhu

Wang Wenwu

Junming Dai

The present application discloses an image generation method, a neural network compression method, and a related apparatus and device in the field of artificial intelligence. The image generation method includes: inputting a first matrix into an initial image generator to obtain a generated image; inputting the generated image into a preset discriminator to obtain a determining result, where the preset discriminator is obtained through training based on a real image and a category corresponding to the real image; updating the initial image generator based on the determining result to obtain a target image generator; and further inputting a second matrix into the target image generator to obtain a sample image. Further, a neural network compression method is disclosed, to compress the preset discriminator based on the sample image obtained by using the foregoing image generation method.

Image generation method, neural network compression method, and related apparatus and device

This application relates to an image recognition technology in the field of computer vision in the field of artificial intelligence, and provides an image classification method and apparatus. The method includes: obtaining an input feature map of a to-be-processed image; performing convolution processing on the input feature map based on M convolution kernels of a neural network, to obtain a candidate output feature map of M channels, where M is a positive integer; performing matrix transformation on the M channels of the candidate output feature map based on N matrices, to obtain an output feature map of N channels, where a quantity of channels of each of the N matrices is less than M, N is greater than M, and N is a positive integer; and classify the to-be-processed image based on the output feature map, to obtain a classification result of the to-be-processed image.

Image classification method and apparatus

Some embodiments of the present disclosure provide a heat recovery device and an air conditioning system. The heat recovery device includes: a shell, provided with an indoor air return port, a first outdoor air inlet and an air outlet; a fresh air heat recovery assembly, disposed in the shell, the fresh air heat recovery assembly including a first heat exchange passage and a second heat exchange passage exchanging heat with each other; and an air valve assembly, disposed in the shell, and located between the fresh air heat recovery assembly and the indoor air return port, the air valve assembly having a first position and a second position.

Heat recovery device and air conditioning system

Some embodiments of the present disclosure provide an air conditioning system. The air conditioning system includes: a housing, having an indoor air supply port; a first heat exchanger, disposed in the housing, an air outlet of the first heat exchanger being communicated with the indoor air supply port; a first air supply mechanism, disposed in the housing, an air outlet of the first air supply mechanism being provided correspondingly to an air inlet of the first heat exchanger; and a plurality of replaceable assemblies, wherein each of the plurality of replaceable assemblies can be assembled in the housing, and the housing is selectively cooperated with one or more of the plurality of replaceable assemblies.

Air conditioning system

In a catalytic reaction, after a reaction product leaves a catalyst bed, an inert substance with a low temperature is sprayed, and through heat absorption and vaporization processes of the inert substance, the temperature of the reaction product drops rapidly when staying in a catalyst cushion layer at a discharge end of a fixed bed reactor, or in a space formed by the catalyst cushion layer at the discharge end of the fixed bed reactor and a reactor head, or in a space formed by a tube plate at the discharge end of the fixed bed reactor and the reactor head. The residence time of the reaction product is shortened due to the entrance of the inert substance in a gaseous state.

Method for improving reaction yield

This application discloses a convolutional neural network-based image processing method and image processing apparatus in the artificial intelligence field. The method may include: receiving an input image; preprocessing the input image to obtain preprocessed image information; and performing convolution on the image information using a convolutional neural network, and outputting a convolution result. In embodiments of this application, the image processing apparatus may store primary convolution kernels of convolution layers, and before performing convolution using the convolution layers, generate secondary convolution kernels using the primary convolution kernels of the convolution layers.

Convolutional neural network-based image processing method and image processing apparatus

A method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on the substrate; forming an etching stop layer on the gate dielectric capping layer; forming an oxygen scavenging element layer on the etching stop layer; forming a first work function adjustment layer on the oxygen scavenging element layer; etching the first work function adjustment layer above the nMOSFET area; forming a second work function adjustment layer on the surface of the substrate; metal layer depositing and annealing to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches.

Method for forming gate structure, method for forming semiconductor device, and semiconductor device

A semiconductor device and a method for manufacturing the same, the method comprising: providing a semiconductor substrate; forming a dummy gate area on the substrate, forming spacers on sidewalls of the gate area, and forming source and drain areas in the semiconductor substrate on both sides of the dummy gate area, the dummy gate area comprising an interface layer and a dummy gate electrode; forming a dielectric cap layer on the dummy gate area and source and drain areas; planarizing the device with the dielectric cap layer on the source and drain areas as a stop layer; further removing the dummy gate electrode to expose the interface layer; and forming replacement gate area on the interface layer. The thickness of the gate groove may be controlled by the thickness of the dielectric cap layer, and the replacement gates of desired thickness and width may be further formed upon requirements. Thus, the aspect ratio of the gate groove is reduced and a sufficient low gate resistance is ensured.

Semiconducor device and method for manufacturing the same

The present invention relates to the field of semiconductor manufacturing. The present invention provides a method of manufacturing a semiconductor device, which comprises: providing a semiconductor substrate; forming an interface layer, a gate dielectric layer and a gate electrode on the substrate; forming a metal oxygen absorption layer on the gate electrode; performing a thermal annealing process on the semiconductor device so that the metal oxygen absorption layer absorbs oxygen in the interface layer and the thickness of the interface layer is reduced. By means of the present invention, the thickness of the interface layer can be reduced on one hand, and on the other hand the metal in the metal oxygen absorption layer is made to diffuse into the gate electrode and/or the gate dielectric layer through the annealing process, which further achieves the effects of adjusting the effective work function and controlling the threshold voltage.

Method of manufacturing a semiconductor device

The present invention provides a semiconductor device, comprising: a semiconductor substrate having a first region and a second region; a first gate structure belong to a PMOS device on the first region; a second gate structure belong to an nMOS device on the second region; a multiple-layer first sidewall spacer on sidewalls of the first gate structure, wherein a layer of the multiple-layer first sidewall spacer adjacent to the first gat structure is an oxide layer; a multiple-layer second sidewall spacer on sidewalls of the second gate structure, wherein a layer of the multiple layers of second sidewall spacer adjacent to the first gat structure is a nitride layer. Application of the present invention may alleviate the oxygen vacancy in a high-k gate dielectric in a pMOS device, and further avoid the problem of EOT growth of an nMOS device during the high-temperature thermal treatment process, and therefore effectively improve the overall performance of the high-k gate dielectric CMOS device.

Semiconductor device and method of manufacturing the same

The present invention relates to a method of manufacturing a semiconductor device. After depositing the metal gate electrode material, a layer of oxygen molecule catalyzing layer having a catalyzing function to the oxygen molecules is deposited, and afterwards, a low-temperature PMA annealing process is used to decompose the oxygen molecules in the annealing atmosphere into more active oxygen atoms. These oxygen atoms are diffused into the high-k gate dielectric film through the metal gate to supplement the oxygen vacancies in the high-k film, in order to alleviate oxygen vacancies in the high-k film and improve the quality of the high-k film. According to the present invention, the oxygen vacancies and defects of high-k gate dielectric film will be alleviated, and further, growth of SiOinterface layer having a low dielectric constant caused by the traditional PDA high temperature process may be prevented. Thereby, the EOT of the entire gate dielectric layer may be effectively controlled, and the MOS device may be continuously scaled. Meanwhile, the present invention further provides a semiconductor device obtained according to the above-mentioned method.

A semiconductor device is provided. A multi-component high-k interface layer containing elements of the substrate is formed from an ultra-thin high-k dielectric material in a single-layer structure of atoms by rapid annealing in the manufacturing of a CMOS transistor by the replacement gate process, and a high-k gate dielectric layer with a higher dielectric constant and a metal gate layer are formed thereon. The EOT of the device is effectively decreased, and the diffusion of atoms in the high-k gate dielectric layer from an upper level thereof is effectively prevented by the optimized high-k interface layer at high-temperature treatment.

A semiconductor device and a method of manufacturing the same are provided. A multi-component high-k interface layer containing elements of the substrate is formed from a ultra-thin high-k dielectric material in a single-layer structure of atoms by rapid annealing in the manufacturing of a CMOS transistor by the replacement gate process, and a high-k gate dielectric layer with a higher dielectric constant and a metal gate layer are formed thereon. The EOT of the device is effectively decreased, and the diffusion of atoms in the high-k gate dielectric layer from an upper level thereof is effectively prevented by the optimized high-k interface layer at high-temperature treatment. Thus, the present invention may also avoid the growth of the interface layers and the degradation of carrier mobility. Furthermore, the present invention may further alleviate the problem of high interface state and interface roughness caused by direct contact of the high-k gate dielectric layer with high dielectric constant and the substrate, and thus the overall performance of the device is effectively enhanced.

Growing community of inventors

Beijing, China

Kai Han