Taiwan Semiconductor Manufacturing Comp. Ltd.

Kai-Fa Ho

Li-Jui Chen

Heng-Hsin Liu

Kai-Chieh Chang

Chun-Lin Louis Chang

Jui-Chun Peng

Yen-Shuo Su

Che-Chang Hsu

Wei-Hsiang Tseng

Ho-Ping Chen

Tsung-Hsun Lee

Ching-Hua Chen

Chia-Yun Lee

Some implementations described herein provide an exposure tool and associated methods of operation in which a scanner control system generates a scanner route for an exposure recipe such that the distance traveled by a substrate stage of the exposure tool along the scanner route is reduced and/or optimized for non-exposure fields on a semiconductor substrate. In this way, the scanner control system increases the productivity of the exposure tool, reduces processing times of the exposure tool, and increases yield in a semiconductor fabrication facility in which the exposure tool is included.

Semiconductor processing tool and methods of operation

An exposure tool is configured to remove contaminants and/or prevent contamination of mirrors and/or other optical components included in the exposure tool. In some implementations, the exposure tool is configured to flush and/or otherwise remove contaminants from an illuminator, a projection optics box, and/or one or more other subsystems of the exposure tool using a heated gas such as ozone (O) or extra clean dry air (XCDA), among other examples. In some implementations, the exposure tool is configured to provide a gas curtain (or gas wall) that includes hydrogen (H) or another type of gas to reduce the likelihood of contaminants reaching the mirrors included in the exposure tool. In this way, the mirrors and one or more other components of the exposure tool are cleaned and maintained in a clean environment in which radiation absorbing contaminants are controlled to increase the performance of the exposure tool.

A reticle is pre-heated prior to an exposure operation of a semiconductor substrate lot to reduce substrate to substrate temperature variations of the reticle in the exposure operation. The reticle may be pre-heated while being stored in a reticle storage slot, while being transferred from the reticle storage slot to a reticle stage of an exposure tool, and/or in another location prior to being secured to the reticle stage for the exposure operation. In this way, the reduction in temperature variation of the reticle in the exposure operation provided by pre-heating the reticle may reduce overlay deltas and misalignment for the semiconductor substrates that are processed in the exposure operation. This increases overlay performance, increases yield of the exposure tool, and increases semiconductor device quality. Moreover, pre-heating the reticle prior to securing the reticle to the reticle stage for the exposure operation reduces and/or minimizes the impact that the pre-heating has on throughput and processing times of the exposure tool.

A stage for supporting a semiconductor substrate is disclosed. The stage includes a platform that defines a plurality of apertures, and a plurality of burls that protrude from the apertures, where the plurality of burls have support surfaces for supporting a region of the semiconductor substrate. The stage includes an actuator coupled to at least a first burl included in the plurality of burls, wherein the actuator is operable to adjust an elevation of a first support surface of the first burl relative to the platform, and control circuitry that controls operation of the actuator to establish a substantially-planar alignment of the support surface of the first burl with a support surface of at least a second burl included in the plurality of burls.

Adjustable substrate support and adjustment method

A system includes a wafer stage adapted to hold a semiconductor wafer thereon. A moveable temperature sensor array is configured to move to a plurality of different positions over a surface of the wafer stage and to take a plurality of temperature measurements at the plurality of positions, respectively. Based on the plurality of temperature measurements, a controller is adapted to determine an expected thermal deformation for the semiconductor wafer or for a reticle arranged over the semiconductor wafer.

Wafer or reticle thermal deformation measuring techniques

The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas.

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Taipei, Taiwan

Kai-Fa Ho