Enkris Semiconductor, Inc.

Enkris Semiconductor (wuxi), Ltd.

Other

Dynax Semiconductor, Inc.

Kai Cheng

Liyang Zhang

Peng Xiang

Kai Liu

Weihua Liu

Yuchao Chen

Yu Zhu

Dandan Zhu

Hongjun Guo

The present application provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a semiconductor substrate, a heterojunction structure, a cap layer, a first passivation layer and a second passivation layer disposed from bottom to up; a trench penetrating through the first passivation layer and the second passivation layer; and a P-type semiconductor layer located at least on an inner wall of the trench. After a part of the second passivation layer is dry etched to form the trench, the first passivation layer can be used for etching endpoint detection to avoid over etching. A part of the first passivation layer exposed by the trench of the second passivation layer can be removed by wet etching.

Enhanced semiconductor structures and manufacturing methods thereof

An N-face polar GaN-based device, a composite substrate thereof, and a method of manufacturing the composite substrate are provided in the present disclosure. The N-face polar GaN-based composite substrate includes: a semiconductor substrate, an insulating layer on the semiconductor substrate and a GaN-based material layer on upper surface of the insulating layer; a surface of the GaN-based material layer attached to the insulating layer is Ga-face, and a surface of the GaN-based material layer away from the insulating layer is an N-face. In the present disclosure, the transfer technology is adopted to replace the direct epitaxial growth, which overcomes the difficult growth process, and the N-face polar GaN-based composite substrate with better quality can be obtained.

N-face polar GaN-based device and composite substrate thereof, and method of manufacturing composite substrate

A semiconductor structure and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes an n-type semiconductor layer, a functional layer, a p-type semiconductor layer, a first AlN layer and a first heavily doped n-type semiconductor layer arranged in sequence. The first AlN layer is provided to reduce the diffusion of p-type ions from the p-type semiconductor layer into the first heavily doped n-type semiconductor layer, to avoid a thicker tunneling junction caused by n-type ions/p-type ions co-doping, to improve the tunneling effect of carriers, to enhance the uniformity of the current density distribution of the first heavily doped n-type semiconductor layer injected into the p-type semiconductor layer, to solve the problem that the p-type semiconductor layer has low carrier mobility and high resistivity.

Semiconductor structure and manufacturing method thereof

The present disclosure provides a full-color LED structure, a full-color LED structure unit, and a method for manufacturing the same. Different wavelengths of light emitted from the first sub-region, the second sub-region and the third sub-region of the light-emitting layer are achieved by controlling different surface dimensions of the bottom wall and the side wall of the first trench or the top wall of the first semiconductor layer. The above process is simple and can form full-color LED structure units during a single epitaxial growth process of the light-emitting layer, such that the size of the full-color LED is reduced, the cost is reduced, the service life is extended, and the reliability is improved.

Full-color LED structure, and full-color LED structure unit and method for manufacturing same

This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.

Semiconductor structures and methods of manufacturing the same

Disclosed is a method for preparing a substrate relate to the field of semiconductors. The method comprises the following steps: S, providing a reaction container in which a base substrate is mounted; S, conducting a metal source into the reaction container, and forming a thin film layer on a surface of the base substrate, wherein a part of a surface of the base substrate is covered by the thin film layer, so that the base substrate is provided with an exposed surface that is not covered by the thin film layer; and S, conducting a corrosive gas into the reaction container to form one or more recessed holes in at least a part of the exposed surface.

Method for preparing a substrate

The present application provides a method of manufacturing a semiconductor structure. The manufacturing method includes following steps: at step S1: forming a first epitaxial structure above a substrate, where the first epitaxial structure is doped with a doping element; at step S2: forming a sacrificial layer above the first epitaxial structure; at step S3: etching the sacrificial layer; at step S4: growing an insertion layer above the first epitaxial structure when the etching of the sacrificial layer is completed; and at step S5: growing a second epitaxial structure above the insertion layer; before proceeding to step S4, repeating step S2 and step S3, until a concentration of the doping element in the first epitaxial structure is lower than a predetermined threshold.

Semiconductor manufacturing method using sacrificial layer etching for doping concentration reduction

The present application discloses a semiconductor structure including: a base, the base being made of an amorphous material and including at least one trench; a monocrystalline layer, at least part of the monocrystalline layer being provided in the trench; and an epitaxial structure layer, located on the side of the monocrystalline layer away from the base. The semiconductor structure disclosed in the present application includes the monocrystalline layer formed in the at least one trench of the base, and an amorphous material with a thermal expansion coefficient similar to that of the monocrystalline layer is selected as the base, which can relieve the tensile stress generated by the monocrystalline layer during the epitaxial process. At the same time, the epitaxial structure layer is grown on an independent monocrystalline layer, and the size is small, which alleviates the problem of semiconductor film cracking on the large-size substrate.

Semiconductor structures

A semiconductor structure and a manufacturing method thereof are provided in the present disclosure. The semiconductor structure includes a semiconductor substrate; a plurality of stacked structures and a plurality of isolation structures on the semiconductor substrate, wherein the stacked structures are spaced apart each other, and each of the isolation structures are located between adjacent stacked structures; each of the stacked structures comprises a nucleation layer and a first epitaxial layer from bottom to top; and a heterojunction structure on the plurality of stacked structures, wherein the heterojunction structure is distributed over an entire surface, and an air gap is formed between the heterojunction structure and each of the isolation structures.

The present disclosure provides a display panel, including a display region, where the display region includes at least a first region and a second region, and the first region and the second region include first GaN-based light emitting diode (LED) units arranged in an array; where the first region and the second region include a display state and an infrared recognition state; in the display state, the first GaN-based LED units in the first region and the second region are configured to display a visible light screen; in the infrared recognition state, the first GaN-based LED units in the first region are configured for emitting infrared light, and the first GaN-based LED units in the second region are configured for sensing infrared light.

Display panel with gallium nitride-based light emitting diode units with display state and infrared recognition state

The present application provides a method of manufacturing a semiconductor structure. Due to different hole ratios of openings of a mask corresponding to one unit region of a substrate, flow rates of reactive gas in openings are different when growing a light emitting layer. In this way, growth rates of the light emitting layers in openings are different, and doping efficiencies of the light emitting layers in openings are different, such that composition proportions of respective elements in the grown light emitting layer are different, and the light emitting wavelengths of LEDs are different.

Method of manufacturing a semiconductor structure, which can be applied to full-color LED

Semiconductor structures and manufacturing methods thereof. A semiconductor structure includes: a first epitaxial layer; a bonding layer, on first epitaxial layer and provided with a first through-hole exposing first epitaxial layer; a silicon substrate, on a side of bonding layer away from first epitaxial layer, first epitaxial layer and the silicon substrate being bonded through the bonding layer; a through-silicon-via, in silicon substrate, through-silicon-via communicating with first through-hole; a second epitaxial layer, on first epitaxial layer exposed by first through-hole; a first electrode, on a side of first epitaxial layer away from bonding layer, and electrically coupled with first epitaxial layer; a second electrode, on a side of second epitaxial layer away from first epitaxial layer, and electrically coupled with second epitaxial layer.

Semiconductor structures and manufacturing methods thereof

The present disclosure provides a resonant tunneling diode including: a first barrier layer; a second barrier layer; a potential well layer between the first barrier layer and the second barrier layer, materials of the first barrier layer, the second barrier layer, and the potential well layer including a group III nitride, a material of the potential well layer including a gallium element; a first barrier layer between the first barrier layer and the potential well layer; and/or a second barrier layer between the second barrier layer and the potential well layer.

Resonant tunneling diodes and manufacturing methods thereof

Provided is a method for stripping a substrate of a semiconductor structure, including: providing a substrate, a first AlN layer, a first AlGaN layer and a function layer from bottom to top; and irradiating the first AlGaN layer from the substrate with laser light to decompose the first AlGaN layer, such that the function layer is separated from the substrate and the first AlN layer.

Substrate stripping method for semiconductor structure by irradiating AlGaN

The present disclosure provides a GaN-based semiconductor structure, including: a substrate; a channel layer; a barrier layer, where the channel layer and the barrier layer each include a gate region, a source region and a drain region; a source region N-type ion heavily-doped layer located in the source region; a drain region N-type ion heavily-doped layer located in the drain region; a gate electrode located in the gate region; a source electrode located on the source region N-type ion heavily-doped layer; and a drain electrode located on the drain region N-type ion heavily-doped layer.

Growing community of inventors

Suzhou, China

Kai Cheng