Infineon Technologies Ag

Infineon Technologies Austria Ag

Kai-Alexander Schreiber

Bernhard Winkler

Martin Zgaga

Sokratis Sgouridis

Andreas Behrendt

Andre Brockmeier

Stefan Woehlert

Uwe Hoeckele

Thomas Detzel

Hubert Maier

Peter Zorn

Francesco Solazzi

Christian Griessler

Katharina Maier

A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.

Methods for producing a cavity within a semiconductor substrate

Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer, for example down to a thickness of 300 &#x3bc;m or below.

Devices with thinned wafer

An integrated circuit including a semiconductor arrangement, a power semiconductor component and an associated production method is disclosed. One embodiment includes a carrier substrate, a first interconnect layer, formed on the carrier substrate and has at least one cutout, an insulating filling layer, formed on the first interconnect layer and the carrier substrate and fills at least one cutout, an SiON layer, formed on the filling layer, and a second interconnect layer, formed over the SiON layer.

Integrated circuit having a semiconductor arrangement

Growing community of inventors

Villach, Austria

Kai-Alexander Schreiber