Samsung Electronics Co., Ltd.

Kab-ju Moon

Hyuk-Sang Kwon

Seong-rae Cho

A flip-flop controller including a clock controller for enabling or disabling a clock signal in response to a clock enabling signal and one or more flip-flops for selectively latching a function mode signal or scan test mode signal in response to a mode selection signal while being synchronous with the clock signal, is provided. As a result, a test vector is easily generated, fault coverage is increased to a desired degree using relatively few test vectors. Also, power consumption can be reduced by disabling the unnecessary portion of the clock signal applied to the flip-flop.

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Kyungki-do, South Korea

Kab-ju Moon