Matsushita Electric Industrial Co., Ltd.

Panasonic Technologies, Inc.

Kaarlo Juhani Hamalainen

Kevin J Stec

Thomas J Leacock

Daniel Qiang Zhu

The present invention is embodied in an apparatus and method for converting a progressive video signal to an interlaced video signal from which the progressive video signal may be recovered. The invention is further embodied in an apparatus and method for converting such an interlaced video signal to a progressive video signal. A progressive-to-interlaced video converter includes a progressive video preprocessor and a converter. The progressive video preprocessor replaces at least one scan line in a video frame by its preceding or succeeding scan line. Alternatively, the preprocessor may assign a predetermined value to one or multiple scan lines at appropriate position(s) in a frame. In either scenario, each frame will carry at least one redundant scan line. The frame modification information will be encoded to an ancillary data section of a digital video stream. An interlaced-to-progressive video converter includes an ancillary data preprocessor, a recursive interlaced-to-progressive converter and two digital standards converters. The preprocessor decodes original frame modification information from the ancillary data section of a digital video stream and provides decoding parameters to the interlaced-to-progressive converter. A digital standards converter is used to convert the resulting 24-frame-per-second progressive video signal to a 60-frame-per-second progressive video signal using a 3:2 pull down. A second digital standards converter is also used to produce a 30-frame-per-second interlaced video signal by repeating every 5th field of the 24-frame-per-second interlaced video input.

Method and apparatus for converting a digital interlaced video signal

A CCD imager is used in a television camera which generates signals for use with a particular television standard, such as the proposed U.S. HDTV production standard. The imager includes a light-sensitive A register which generates signal in the form of charge during an integrating interval, a B charge storage register into which the charge is transferred during a pull-down interval, and a horizontal shift register coupled to the last row of the B register, into which the charges are simultaneously coupled, and serially read. The video signals produced by the imager are subject to distortion caused by incomplete charge transfer in the pull-down interval and crosstalk noise resulting from gating the clock signals to the horizontal shift register on and off. Vertical transfer distortion is reduced by reading the horizontal lines from the horizontal shift register with reduced intervals between the active portions, which allows the pull-down interval to be increased. The increased pull-down interval allows use of a lower frequency signal for the vertical transfer clock signal. Crosstalk noise is reduced by applying the horizontal shift register clock to the horizontal shift register continuously.

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Medford, NJ, United States of America

Kaarlo Juhani Hamalainen