Marvell International Limited

Marvell Asia Pte., Ltd.

Marvellworld Trade Ltd.

Ka-Ming Keung

Fei Sun

Tony Yoon

Wei Xu

Jinjin He

Dung Viet Nguyen

ChengKuo Huang

Young-Ta Wu

A storage access request to access a solid state drive (SSD) is received. A storage access timer is set with a time duration, where the time duration is based on a desired performance of the SSD. A non-volatile memory command associated with the storage access request is sent to non-volatile memory. The storage access timer is started. A determination is made whether the non-volatile memory completed execution of the non-volatile memory command after the storage access timer indicates that the time duration elapsed. An indication that the storage access request is complete is sent to a host if the non-volatile memory completed execution of the non-volatile memory command. Alternatively, the storage access timer is reset with the time duration if the non-volatile memory has not completed execution of the non-volatile memory command.

Controlling performance of a solid state drive

A method for storing data on a storage device includes receiving data to be stored and a logical address for storing the data. A physical address is determined and the data to be stored is stored at the determined physical address. A table that associates logical addresses with physical addresses is examined to determine a difference relationship between the determined physical address and a corresponding physical address for one of other logical addresses. Information representing the determined physical address is stored in the table, in association with the received logical address, as a function of the determined difference relationship. A data storage device includes controller circuitry and memory for storing a lookup table that associates logical addresses with physical addresses. The controller circuitry operates in accordance with the method.

Dynamic differential compression for storage device look-up table

Aspects of the disclosure provide a circuit that includes a memory circuit and a controller circuit. The memory circuit is to have a look-up table (LUT) that associates logical address used in computation with physical address used in storage space. The LUT includes a first level LUT with first level entries corresponding to logical addresses, each first level entry includes an indicator field and a content field, and the indicator field is indicative of a compressible/non-compressible attribute of a physical address associated with a logical address. The controller circuit is to receive a logical address, and translate the logical address into a physical address associated with the logical address based on the LUT.

Method and apparatus for compressing LUT

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San Jose, CA, United States of America

Ka-Ming Keung