Industrial Technology Research Institute

Electronics Research & Service Organization

Jyh-Ren Yang

Chung-Tao Chang

Tien-Yu Wu

Ching-Ching Chi

Ruey-Wen Chien

A switchable I/O buffer for multi-chip modules comprising a conventional I/O buffer and a miniaturized I/O buffer. A path switch selects the conventional I/O buffer or the minaturized I/O buffer according to whether the I/O interconnection is for communication off the module or chip-to-chip communication within the module. The miniaturized I/O buffer comprises a single-ended I/O buffer without electrostatic discharge protection. Two layout structures are designed for the switchable I/O buffer. A first layout structure having its path switching control provided by either a cell-programmable method or a mask-programmable method can be used for a multi-chip module or a PWB single package. A second layout structure using a pad-programmable method to provide the path switching control is suitable for a multi-chip module with flip-chip attachment technology. Four different circuit implementations of the switchable I/O buffer are presented. The switchable I/O buffer achieves higher performance with lower power dissipation in that the unnecessary heavy loading and electrostatic discharge protection are eliminated from the interconnection for chip-to-chip communication within the multi-chip module.

Switchable MCM CMOS I/O buffers

An address decoder having non-overlapping word line enable is disclosed having a dynamic logic gate-based decoding section. The decoder includes a deadtime signal generator that produces a pulse at the rising edge of every input clock cycle. The decoder further includes a transmission gate responsive to the deadtime signal for selectively passing the decoder section output signal to a latch. The decoder further includes a NOR logic having an output for coupling to a memory word line which is gated by the deadtime signal to disable the output while the transmission gate passes the decoder output to the latch. When the deadtime pulse transitions to a low state, the latch captures the decoder output signal and enables the output of the NOR gate.

Growing community of inventors

Hsinchu, Taiwan

Jyh-Ren Yang