Taiwan Semiconductor Manufacturing Comp. Ltd.

Jyh-Nan Lin

Ding-I Liu

Kai-Shiung Hsu

Chun-Jen Chen

Chia-Yu Wu

Yuh-Ta Fan

Li Shu Chen

Hsiao-Min Chen

Po-Hsiung Leu

Chin-Feng Sun

Mu-Min Hung

Tsung-Dar Lee

A method for improving reliability of interconnect structures for semiconductor devices is disclosed. The method includes forming a contact structure on a transistor and forming a metallization layer on the contact structure. The forming the metallization layer includes depositing an inter-metal dielectric (IMD) layer on the transistor, forming an opening within the IMD layer to expose a top surface of the contact structure, depositing a metallic layer to fill the opening, forming an electron barrier layer within the IMD layer, and forming a capping layer within the metallic layer. The electron barrier layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the IMD layer underlying the electron barrier layer. The capping layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the metallic layer underlying the capping layer.

Electron migration control in interconnect structures

A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.

Amorphous layers for reducing copper diffusion and method forming same

In a method of manufacturing a semiconductor device, a first dielectric layer is formed over a substrate, an adhesion enhancement layer is formed on a surface of the first dielectric layer, and a second dielectric layer is formed on the adhesion enhancement layer.

Method of manufacturing semiconductor device and semiconductor devices

A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.

Semiconductor device having a multi-layer diffusion barrier and method of making the same

Method of manufacturing semiconductor devices including formation of adhesion enhancement layer

Semiconductor device having multi-layer diffusion barrier and method of making the same

Aluminum-containing layers and systems and methods for forming the same are provided. In an embodiment, a method includes depositing an aluminum-containing layer on a substrate in a chamber by atomic layer deposition. The depositing further includes contacting the substrate with an aluminum-containing precursor in a first pulse having a first peak pulse flow rate and a first pulse width; contacting the substrate with a nitrogen-containing precursor; contacting the substrate with the aluminum-containing precursor in a second pulse having a second peak pulse flow rate and a second pulse width; and contacting the substrate with the nitrogen-containing precursor. The first peak pulse flow rate is greater than the second peak pulse flow rate. The first pulse width is smaller than the second pulse width.

Aluminum-containing layers and methods of forming the same

Semiconductor device having a multi-layer diffusion barrier

Structures and formation methods of a semiconductor device structure are provided. A method includes depositing a first layer including Al atoms to cover a first dielectric layer in a first conductive feature. The method also includes depositing a second layer including N atoms over the first layer. The first layer and the second layer form an etch stop layer including aluminum nitride. The etch stop layer includes vacancies and has an atomic percentage of Al to Al and N. The method also includes filling the vacancies in the etch stop layer with additional N atoms to reduce the atomic percentage of Al to Al and N. In addition, the method includes forming a second dielectric layer over the etch stop layer. The method also includes forming a second conductive feature in the second dielectric layer and the etch stop layer to be connected to the first conductive feature.

Structure and formation method of interconnection structure of semiconductor device

A method of forming an interlayer dielectric film above a metal gate of a metal oxide semiconductor device comprises forming a metal gate above a semiconductor substrate; and forming the interlayer dielectric film above the metal gate by reacting a silicon-containing compound as precursor and a reactant for oxidizing the silicon-containing compound. The silicon-containing compound has the formula:Si(A)(B)(C)(D)&#x2003;&#x2003;(I)wherein x is in the range of from 1 to 9; y+z+m+n is in the range of from 4 to 20; and A, B, C, and D independently represent a functional group connecting with a silicon atom. The functional group is selected from a group consisting of alkyl, alkenyl, alkynyl, aryl, alkylaryl, alkoxyl, alkylcarbonyl, carboxyl, alkylcarbonyloxy, amide, amino, alkylcarbonylamino, &#x2014;NO, and &#x2014;CN.

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Hsinchu, Taiwan

Jyh-Nan Lin