Lg Display Co., Ltd.

Juyun Lee

Jongbeom Lee

Beumsik Cho

Soonhwan Hong

Sunji Moon

The present disclosure provides a display device including a display panel and a scan driver. The display panel has a display area for displaying an image. A scan driver is arranged in a non-display area of the display panel, and includes circuits for generating scan signals and a scan driver having signal lines for transferring signals and voltages for driving the circuits. Each of the circuits is composed of a plurality of stages and disposed along the display area, and the signal lines are disposed outside the circuits.

Display device having a scan driver including a plurality of stages and signal lines arranged in a stair pattern

A display device includes a display panel, a data driver, a multiplexer, and a multiplexer controller. First to fourth color subpixels are disposed on the display panel. The data driver outputs a data voltage to be supplied to the first to fourth color subpixels, through output buffers. The multiplexer distributes each of data voltages output by output buffers to four data lines in a time division manner in response to first to fourth control signals. The multiplexer controller sequentially outputs a first control signal to an nth control signal during a first horizontal period, and sequentially outputs the nth control signal to the first control signal during a second horizontal period. The first and second horizontal periods include first to fourth scan periods which are continuous and uniform, and a subpixel receiving a data voltage output during the first scan period of the first horizontal period and a subpixel receiving a data voltage output during the first scan period of the second horizontal period are subpixels of the same color.

Display device subpixel activation patterns

A display device includes a data driver, a multiplexer, and a multiplexer controller. The data driver outputs a data voltage through output buffers. The multiplexer distributes each of the data voltages output by the output buffers to data lines in a time division manner in response to first to control signals. The multiplexer controller sequentially outputs control signals in a time division manner. Each control signal transitions to a gate ON voltage during a prior horizontal period and maintains the gate ON voltage for an intended horizontal period.

Growing community of inventors

Paju-si, South Korea

Juyun Lee