Samsung Electronics Co., Ltd.

Electronics and Telecommunications Research Institute

Juyul Lee

Kihyun Hwang

Kwangmin Park

Sunghoi Hur

Kwang Soo Seol

Hanmei Choi

Chanjin Park

Toshiro Nakanishi

Wansik Hwang

Jongsik Chun

Siyoung Choi

Dongchul Yoo

Seungjae Baik

Hansoo Kim

Sunil Shim

Jaehoon Jang

Wonseok Cho

Jae-young Ahn

Woonkyung Lee

Jaeyoung Ahn

Myung Don Kim

Juwan Lim

Jinup Kim

Wookhyoung Lee

Bumsu Kim

Hyun Kyu Chung

Keun Young Kim

Bong Hyuk Park

Minuk Kim

Joon Ho Cho

Seung-Hwan Lee

Seong Chul Cho

Hyun Kyu Park

Jae Joon Park

Jubum Kim

Myung-Don Kim

Hyun Ku Park

Eun Ae Lee

Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Three-dimensional semiconductor memory devices and methods of fabricating the same

Disclosed are an apparatus and a method for estimating a parameter of a multi path signal. The apparatus for estimating a parameter of a multi path signal includes: a plurality of pre-processing units configured to pre-process respective reception signals received through a plurality of antennas; a plurality of parameter converting units configured to approximate a parameter set of the respective pre-processed reception signals to have a sparse characteristic in a Doppler frequency and angle of arrival domain; and a parameter estimating unit configured to estimate an angle of arrival for a plurality of reception signals in each frequency region of the Doppler frequency and angle of arrival domain.

Apparatus and method for estimating parameter of multi path signal

Disclosed is an antenna array, including: a first antenna; a second antenna; and a dielectric substance, of which a height is determined based on a distance between the first and second antennas and forms of beam patterns of the first and second antennas. According to the antenna array according to the exemplary embodiments of the present invention, it is possible to decrease coupling between the antennas.

Antenna array

A method and terminal for performing beamforming. The beamforming method of a terminal includes acquiring a beamforming signal, calculating a beamforming coefficient to correspond to locations of a transmitter and a receiver, based on the beamforming signal, acquiring sensor information of the terminal, estimating a channel parameter based on the sensor information, and determining a final beamforming coefficient based on the beamforming coefficient and the channel parameter.

Method and terminal for performing beamforming based on sensor information of terminal

Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.

Semiconductor device having staggered pillars

A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Semiconductor device

A method of connecting base stations by a one-way cooperative channel forming a beam is provided. Since it is possible to determine directions of beams and to distribute power components by small amounts of calculations, it is possible to realize the base stations in a one-way cooperative situation with small expenses. In addition, the base stations according to the exemplary embodiment of the present invention may minimize the influence of interference generated by signals transmitted by other base stations through the one-way cooperative channel and the influence of interference generated by signals transmitted to other terminals.

Method and apparatus for forming beam through one-way cooperative channel

A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the gate electrode and the substrate, the charge trapping layer having trap sites configured to trap charges; a charge tunneling layer between the trapping layer and the semiconductor substrate; and a charge blocking layer between the gate electrode and the trapping layer. The charge trapping layer comprises a deep trapping layer having a plurality of energy barriers and a high density trapping layer having a trap site density higher than a trap site density of the deep trapping layer.

Nonvolatile memory devices including deep and high density trapping layers

A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the substrate and the gate electrode; a charge tunneling layer between the charge trapping layer and the substrate; and a charge blocking layer between the gate electrode and the charge trapping layer. The charge trapping layer includes a first charge trapping layer having a first energy band gap and a second charge trapping layer having a second energy band gap that is different than the first energy band gap. The first and second charge trapping layers are repeatedly stacked and the first and second energy band gaps are smaller than energy band gaps of the charge tunneling layer and the charge blocking layer.

Nonvolatile memory devices including multiple charge trapping layers

Growing community of inventors

Seoul, South Korea

Juyul Lee