Gvbb Holdings S.a.r.l

Grass Valley Canada

Juul Josephus Johannes Van Den Heijkant

Jeroen Rotte

Rik Visser

Petrus Gijsbertus Centen

Rudolf Van Ree

A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.

System and method for high dynamic range digital double sampling

An imaging system is provided that includes a pixel array having a plurality of columns with rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. Moreover, the system includes row driver circuitry that control the pixel array for pixel addressing and readout, such that the respective accumulation voltages of the photodiodes is read out on a readout channel coupled to a bit line column, and a hybrid multiplexer that multiplexes and routes output signals from the pixel array to a video imaging device to be displayed thereon.

Hybrid output multiplexer for a high framerate CMOS imager

An imager that includes a pixel array with a plurality of columns having rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. The imager further includes row driver circuitry that controls the pixel array for pixel addressing and readout, with the row driver circuitry including a plurality of shift registers, and an image sensor controller that controls the plurality of shift registers to address the rows of pixels in the pixel array. Moreover, the row driver circuitry dynamically upward and downward shifts control signals to the pixel array, such that two rows of pixels in a single column of the pixel array are addressed during a single row time.

Imager with vertical row addressing

A method for performing differential double sampling and a CMOS image sensing device for performing the same. In one example, the CMOS image sensing device includes a pixel array include a multitude of pixels with each pixel formed by a plurality of photodiodes, a floating diffusion point and a plurality of transistors electrically coupled the plurality of photodiodes. Moreover, a column readout circuit with four storage capacitors is selectively coupled to the pixel array by switches so that the storage capacitors can store sampled pixel values. A control circuit connected to the pixel array and the column readout circuit selectively activates the transistors to output to the column readout circuit sampled dark value and bright values of one photodiode and a sampled double bright value of the one photodiode and one additional photodiode.

Differential digital double sampling method and CMOS image sensor for performing same

A CMOS image sensor with reducing interconnections is provided. The CMOS image sensor may include a first row of pixels that includes a first pixel. The first pixel may include a first plurality of photodiodes and a first plurality of transfer gates. Each of the first plurality of photodiodes may be associated with a corresponding one of the first plurality of transfer gates. The CMOS image sensor may include a second row of pixels that includes a second pixel. The second pixel may include a second plurality of photodiodes and a second plurality of transfer gates. Each of the second plurality of photodiodes may be associated with a corresponding one of the second plurality of transfer gates. A first one of the transfer gates of the first plurality of transfer gates may be coupled to a first one of the transfer gates of the second plurality of transfer gates.

Cross pixel interconnection

A camera using a CMOS image sensor based on a shared pixel array technology avails both high definition (HD) and ultra-high definition (UHD) resolution mode formats. Dynamic pixel management allows for both sequential and binned timing formats of pixel signals using switched capacitor noise reduction techniques. When UHD resolution mode is selected, noise can be reduced using both digital double sampling (DDS) or differential digital double sampling (dDDS), and when HD resolution mode is selected noise can be reduced using DDS. Additionally, both rolling shutter and global shutter modes can be selected when HD resolution mode is selected.

Growing community of inventors

Breda, Netherlands

Juul Josephus Johannes Van Den Heijkant