Cadence Design Systems, Inc.

Jushan Xie

Saibal Saha

Ru Huang

Donald John O'Riordan

Hongzhou Liu

Zhihong Liu

Runsheng Wang

James Chieh-Tsung Chen

Yanhui Li

Richard John O'Donovan

An-Chang Deng

Xisheng Zhang

Alvin Chen

Jingkun Fang

Michael Tian

John O'Donovan

Chunyi Huang

Tianlei Guo

Xucheng Pang

Shaofeng Guo

Zhuoqing Yu

Si-Yu Liao

A method, a system and a non-transitory machine-readable storage medium are provided. In one or more aspects, a computer-implemented method for bias temperature instability (BTI) calculation of a device includes simulating the device, using an electronic design automation tool. The simulation includes determining a first degradation value after applying a first sequence of stress values to the device for a first plurality of time steps. The simulation further includes determining a first degradation recovery value after the first plurality of time steps. The simulation further includes determining a first recovered degradation value after the first plurality of time steps by combining the first degradation value and the first degradation recovery value. The first degradation value, the first degradation recovery value, and the first recovered degradation value are associated with one or more model parameters of the device. The simulation is a transient analysis simulation, and the device is a FINFET or MOSFET device.

Method of bias temperature instability calculation and prediction for MOSFET and FinFET

A system, method, and computer program product for facilitating model binning in circuit simulators. Embodiments enable specification of models spanning binning dimensions, such as device width and length, in a model group via inheritable model bins. New simulator modeling syntax and semantics eliminate much of the redundancy and parsing overhead from model parameter specifications in foundry process design kits. Indirect and optional inheritance is also enabled, allowing for fine grain and coarse grain grids in the same model group.

Spice model bin inheritance mechanism

A system, method, and computer program product for extending device model parameter specification flexibility when using a subcircuit wrapper. Embodiments facilitate device modeling by allowing a modeling engineer to eliminate the explicit specification of a large set of wrapped device instance parameters as parameters to the subcircuit wrapper itself. A circuit designer may now use the subcircuit wrapper to specify an instance of the subcircuit without having to explicitly provide values for all such parameters. The simulator program's built-in device model calculates its default parameter values, which are often the result of complex expressions involving the other parameters, resulting in more accurate simulations. Subcircuit wrappers no longer need to be explicitly regenerated when a new version of the wrapped device model becomes available for the simulator (e.g., one that supports additional instance parameters that were not present on the earlier version when the subcircuit wrapper was created).

Simplified device model extension using subcircuits

A system, method, and computer program product for automatically approximating conventional Monte Carlo statistical device model evaluation for circuit simulation with drastic speed improvements, while preserving significant accuracy. Embodiments enable quick inspection of the effects of process mismatch variations on single devices and even large circuits compared to standard computationally prohibitive Monte Carlo analysis. Statistical device model variation is calculated as if all such variation is due to changes in threshold voltage, even though other physical phenomena are known to contribute. Threshold voltage variation is modeled as a function of statistical variation, device size, and working bias condition. Circuit simulation is faster when the full internal device model parameter set is not rebuilt for every Monte Carlo analysis iteration. Embodiments are compatible with both conventional SPICE and newer Fast SPICE simulations. Circuit designers may capture design sensitivity to manufacture process changes more easily with simplified statistical models.

Fast monte carlo statistical analysis using threshold voltage modeling

An exemplary method for simulating the effect of mismatch in design flows comprises receiving measured data, receiving an original model, extracting a mismatch model based on the measured data and the original model, attaching the mismatch model to the netlist to obtain a modified netlist, and simulating an effect of mismatch based on the modified netlist. In one embodiment, the extracting of a mismatch model includes selecting a set of model parameters, generating a distribution of mismatch values for each of the model parameters, extracting a set of linking coefficients based on said mismatch values, and extracting said mismatch model based on said set of linking coefficients. In another embodiment, the attaching of the mismatch model to the netlist includes determining a number of layers in the netlist, generating a copy of a lower layer in the netlist, the copy including a reference to a mismatch model definition, generating a copy of a higher layer in the netlist, replacing a reference to the lower layer in the higher layer by a reference to the copy of the lower layer, and generating a new model definition.

Apparatus and methods for modeling and simulating the effect of mismatch in design flows of integrated circuits

Growing community of inventors

Pleasanton, CA, United States of America

Jushan Xie