Massachusetts Institute of Technology

Nanyang Technological University

Intel Corporation

Fujifilm Corporation

National University of Singapore

Leland Stanford Junior University

California Institute of Technology

At&t Bell Laboratories

Cornell University

University of Rochester

Jurgen Michel

Lionel Cooper Kimerling

Jifeng Liu

Kazumi Wada

Anuradha Murthy Agarwal

Dong Pan

Wojciech P Giziewicz

Donghwan Ahn

Yukiya Miyachi

Jun-Fei Zheng

Yiding Lin

Li Hong Zhang

Luca Dal Negro

Chuan Seng Tan

Eng Kian Kenneth Lee

Bing Wang

Soo-Jin Chua

Siau Ben Chiah

Li-Shiuan Peh

Ning-Ning Feng

Yan Cai

Rodolfo E Camacho-Aguilera

Jonathan T Bessette

Sajan Saini

Samarth Aggarwal

Michelle L Clark

Victor Trinh Nguyen

Wenjia Zhang

Zhaomin Zhu

Eveline Postelnicu

Edward Hartley Sargent

Eugene A Fitzgerald

Harry A Atwater

Michal Lipson

Steven G Johnson

Mark Luitzen Brongersma

Hermann A Haus

Andrea Ivano Melloni

John Milo Poate

John A Yasaitis

Philippe M Fauchet

Kwang Hong Lee

Thomas L Koch

Lionel C Kimerling

Carlos Angulo Barrios

Christina Manolatou

Francesco Morichetti

Antonio Canciamilla

Yasha Yi

Shuyu Bao

Dale C Jacobson

Janet L Benton

Danhao Ma

Pao Tai Lin

Rong Sun

Jae Hyung Yi

Stefano Grillanda

Samuel Serna

Vivek Raghunathan

Vivek Singh

Drew Michael Weninger

A layer of amorphous Ge is formed on a substrate using electron-beam evaporation. The evaporation is performed at room temperature. The layer of amorphous Ge has a thickness of at least 50 nm and a purity of at least 90% Ge. The substrate is complementary metal-oxide-semiconductor (CMOS) compatible and is transparent at Long-Wave Infrared (LWIR) wavelengths. The layer of amorphous Ge can be used as a waveguide in chemical sensing and data communication applications. The amorphous Ge waveguide has a transmission loss in the LWIR of 11 dB/cm or less at 8 &#x3bc;m.

Amorphous germanium waveguides for spectroscopic sensing and data communication applications

Disclosed is a method of facilitating straining of a semiconductor element () for semiconductor fabrication. In a described embodiment, the method comprises: providing a base layer () with the semiconductor element () arranged on a first base portion () of the base layer (), the semiconductor element () being subjected to a strain relating to a characteristic of the first base portion (); and adjusting the characteristic of the first base portion () to facilitate straining of the semiconductor element ().

Method of facilitating straining of a semiconductor element for semiconductor fabrication, semiconductor platform obtained by the method, and optoelectronic device comprising the semiconductor platform

Optical interconnects can offer higher bandwidth, lower power, lower cost, and higher latency than electrical interconnects alone. The optical interconnect system enables both optical and electrical interconnection, leverages existing fabrication processes to facilitate package-level integration, and delivers high alignment tolerance and low coupling losses. The optical interconnect system provides connections between a photonics integrated chip (PIC) and a chip carrier and between the chip carrier and external circuitry. The system provides a single flip chip interconnection between external circuitry and a chip carrier using a ball grid array (BGA) infrastructure. The system uses graded index (GRIN) lenses and cross-taper waveguide couplers to optically couple components, delivers coupling losses of less than 0.5 dB with an alignment tolerance of &#xb1;1 &#x3bc;m, and accommodates a 2.5&#xd7; higher bandwidth density.

Simultaneous electrical and optical connections for flip chip assembly

An integrated optical modulator array useful for modulating light at different wavelengths in the same optical band includes multiple GeSi waveguides on a substrate. Each GeSi waveguide has a different width and is coupled to electrodes to form an electro-absorption modulator. A stressor material, such as SiN, disposed between the GeSi waveguides in the optical modulators applies a strain to the GeSi waveguides. Because each GeSi waveguide has a different width, it experiences a different strain. This difference can be a difference in magnitude, type (homogeneous v. inhomogeneous, compressive v. tensile), or both. The different strains shift the bandgaps of the Ge in the GeSi waveguides by different amounts, shifting the optical absorption edges for the GeSi waveguides by different amounts. Put differently, the stressor layer strains each GeSi modulator differently, causing each GeSi modulator to operate at a different wavelength.

Strained germanium silicon optical modulator array including stress materials

In a method for electrically doping a semiconducting material, a layer of germanium is formed having a germanium layer thickness, while in situ incorporating phosphorus dopant atoms at a concentration of at least about 5&#xd7;10cmthrough the thickness of the germanium layer during formation of the germanium layer. Additional phosphorus dopant atoms are ex situ incorporated through the thickness of the germanium layer, after formation of the germanium layer, to produce through the germanium layer thickness a total phosphorus dopant concentration of at least about 2&#xd7;10cm.

Method for high-concentration doping of germanium with phosphorous

A method of manufacturing a germanium-on-insulator substrate is disclosed, comprising: (i) doping a first portion of a germanium layer with a first dopant to form a first electrode, the germanium layer arranged with a first semiconductor substrate; (ii) forming at least one layer of dielectric material adjacent to the first electrode to obtain a combined substrate; (iii) bonding a second semiconductor substrate to the layer of dielectric material and removing the first semiconductor substrate from the combined substrate to expose a second portion of the germanium layer with misfit dislocations; (iv) removing the second portion of the germanium layer to enable removal of the misfit dislocations and to expose a third portion of the germanium layer; and (v) doping the third portion of the germanium layer with a second dopant to form a second electrode. The electrodes are separated from each other by the germanium layer, and the first dopant is different to the second dopant.

Method of manufacturing a germanium-on-insulator substrate

A method of forming an integrated circuit is disclosed. The method includes: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.

Method of forming an integrated circuit and related integrated circuit

A device includes a substrate, a pedestal extending from the substrate, and a ring resonator disposed on the pedestal above the substrate. The ring resonator has a resonance wavelength greater than 1.5 &#x3bc;m and includes at least one of silicon and chalcogenide glass. The device can be used as a ring resonator sensor or a light source. The ring resonator is substantially transparent to mid-infrared radiation to reduce optical losses. The pedestal has a narrower width compared to the ring resonator to generate improved interaction between evanescent fields of light in the ring resonator and analytes nearby the ring resonator, thereby increasing sensing sensitivity. In addition, fabrication of the device is compatible with complementary metal-oxide-semiconductor (CMOS) processes and hence is amenable to large scale manufacturing.

Methods and apparatus for pedestal ring resonators

A method () of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing () the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding () at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.

In a method of forming a photonic device, a first silicon electrode is formed, and then a germanium active layer is formed on the first silicon electrode while including n-type dopant atoms in the germanium layer, during formation of the layer, to produce a background electrical dopant concentration that is greater than an intrinsic dopant concentration of germanium. A second silicon electrode is then formed on a surface of the germanium active layer. The formed germanium active layer is doped with additional dopant for supporting an electrically-pumped guided mode as a laser gain medium with an electrically-activated n-type electrical dopant concentration that is greater than the background dopant concentration to overcome electrical losses of the photonic device.

High-concentration active doping in semiconductors and semiconductor devices produced by such doping

In a photonic waveguide, there is provided an undercladding layer and a waveguide core, having a cross-sectional height and width, that is disposed on the undercladding layer. The waveguide core comprises a waveguide core material having a thermo-optic coefficient. A refractive index tuning cladding layer is disposed on top of the waveguide core. The refractive index tuning cladding layer comprises a refractive index tuning cladding material having an adjustable refractive index and an absorption length at a refractive index tuning radiation wavelength. A thermo-optic coefficient compensation cladding layer is disposed on top of the refractive index tuning cladding layer. The thermo-optic coefficient compensation cladding layer comprises a thermo-optic coefficient compensation material having a thermo-optic coefficient that is of opposite sign to the thermo-optic coefficient of the waveguide core material. The thermo-optic coefficient compensation cladding layer provides at least partial compensation for the waveguide core thermo-optic coefficient.

Athermal photonic waveguide with refractive index tuning

A method of fabricating a large area photodiode is provided. The method includes providing a substrate having a first contact layer formed thereon. Also, the method includes forming a dielectric layer on the first contact layer and patterning selective areas of the dielectric layer to form a plurality of dielectric windows. Each of the dielectric windows has an open region exposing the first contact layer. Furthermore, the method includes epitaxially growing photodiode material(s) in the dielectric windows, wherein each of the dielectric windows are individualized photodiode structures.

Dark current reduction for large area photodiodes

An optical amplifier on a silicon platform includes a first doped device layer and a second doped device layer. A gain medium is positioned between the first and second doped device layers. The gain medium comprises extrinsic gain materials so as to substantially confine in the gain medium a light signal and allow the optical amplifier to be electrically or optically pumped.

Electrically pumped extrinsic semiconductor optical amplifier with slot waveguide

A light emitting device is provided that includes at least one first semiconductor material layers and at least one second semiconductor material layers. At least one near-direct band gap material layers are positioned between the at least one first semiconductor layers and the at least one second semiconductor material layers. The at least one first semiconductor layers and the at least one second material layers have a larger band gap than the at least one near-direct band gap material layers. The at least one near-direct band gap material layers have an energy difference between the direct and indirect band gaps of less than 0.5 eV.

Engineering emission wavelengths in laser and light emitting devices

Growing community of inventors

Arlington, MA, United States of America

Jurgen Michel