Infineon Technologies Ag

Qimonda Ag

Jurgen Grafe

Jochen Thomas

Peter Weitz

Jens G Pohl

Harry Hedler

Sylke Ludewig

An apparatus and a method of manufacture for a stacked-die assembly. A first die is placed on a substrate such that the backside of the die, i.e., the side opposite the side with the bond pads, is coupled to the substrate, preferably by an adhesive. Wire leads electrically couple the bond pads of the first die to contacts on the substrate. A second die is placed on the first die, and wire leads electrically couple the bond pads of the second die to contacts on the substrate. Preferably, a spacer is placed between the first die and the second die. Additional dies may be stacked on the second die.

Integrated circuit with re-route layer and stacked die assembly

A semiconductor module having an internal semiconductor chip stack on a wiring substrate is disclosed. In one embodiment, the semiconductor chip stack has semiconductor chips which are arranged such that they are offset, the semiconductor chips having bonding connection pads in at least one edge region of their active top side. These bonding connection pads are electrically connected to the wiring substrate via bonding connections. In this case, the semiconductor chips are stacked on top of one another in an offset manner such that the bonding connection pads remain free of a semiconductor chip which is stacked on top of them. In this case, the semiconductor chips may be identical silicon chips which may differ, for example in pairs, in terms of their wiring structure for the centrally arranged contact areas in different edge regions.

Semiconductor module having an internal semiconductor chip stack, and method for producing said semiconductor module

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Dresden, Germany

Jurgen Grafe