Samsung Display Co., Ltd.

JunYong Song

Bonghyun You

Sanghyun Heo

Chaehee Park

Jae-Hyun Kim

Jaehoon Lee

Jae Keun Lim

Donggyu Lee

Oh Jo Kwon

Dong Won Lee

Yu-Han Bae

Taejin Kim

Jiwoong Kim

Jongman Bae

Jaewoong Kang

Kyungyoul Min

Yongjun Jang

Jundal Kim

Jeon Kyoo Kim

HyunSu Kim

Dong-Won Park

Heesun Ahn

Taeyoung Jin

An electronic device includes a host processor including a data transmitter, a driving driver, and a display panel. The data transmitter includes a phase locked loop that generates a first clock and a second clock, a clock block that receives the first clock, a plurality of data blocks that receives the second clock, a first buffer connected between the phase locked loop and the clock block, and a plurality of second buffers respectively connected between the phase locked loop and the plurality of data blocks, and the first buffer and each of the plurality of second buffers may be activated or deactivated depending on an interface mode.

Processor and electronic device including the same

A display apparatus includes an integral integrated circuit and a display panel. The integral integrated circuit includes a gate channel which outputs a gate primitive signal and a data channel which outputs a data voltage. The display panel includes a level shifter which amplifies the gate primitive signal to generate a gate signal. The display panel is configured to display an image based on the gate signal and the data voltage. The display panel includes a first gate line extending in a first direction and a second gate line extending in a second direction. The second direction is different from the first direction. The second gate line is connected to the first gate line. The level shifter is connected to the second gate line.

Display apparatus

A display device includes data lines, scan lines, and pixels. Each of the pixels includes an organic light emitting diode, a first transistor (OLED), and a second transistor. The first transistor is electrically connected to an anode of the OLED. The second transistor is electrically connected to the first transistor, a scan line among the scan lines, and a data line among the data lines. The second transistors of the pixels may receive instances of a reference voltage from the data lines during a first period of a frame. The second transistors of the pixels may simultaneously receive instances of a turn-on scan signal from the scan lines during the first period of the frame. Cathodes of the OLEDs of the pixels may receive instances of a turn-off voltage for the OLEDs to turn off during the first period of the frame.

Display device and method of driving display device

A display apparatus includes an image data compensator. The image data compensator receives input image data, compensates for the input image data according to a temperature of a display panel to output first compensation image data in order to compensate for a luminance decrease of the display panel according to the temperature of the display panel, and compensates for the first compensation image data according to an efficiency and a life expectancy of a quantum dot to output second compensation image data in order to compensate for a luminance decrease of the display panel by the quantum dot.

Display apparatus and method of driving the same

A display device includes a timing controller which transmits an image control signal and at a same time receive a feedback signal, a source driver which transmits the feedback signal and receive the image control signal, and a duplex communication path between the timing controller and the source driver, where the timing controller detects a voltage level of a signal received through the duplex communication path and recovers the feedback signal according to the detected voltage level.

Display device including timing controller and duplex communication method of the same

A display apparatus includes: a display panel which displays an image based on a display mode; a data driver which provides data signals to the display panel; a gate driver which starts an operation thereof in response to a start signal, and comprises stages and at least two dummy stages, where the stages sequentially provides gate signals to the display panel; and a timing controller which selects a signal from the start signal and a reset signal based on the display mode and outputs the selected signal selected to the at least two dummy stages, where each stage receives a clock signal, a previous carry signal from a previous stage, a first subsequent carry signal from a first subsequent stage and a second subsequent carry signal from a second subsequent stage, and outputs a corresponding gate signal of the gate signals and a carry signal.

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Hwaseong-si, South Korea

JunYong Song