Samsung Electronics Co., Ltd.

Osong Medical Innovation Foundation, Korea University Research and Business Foundation

Junyeon Lee

Wooseok Chang

Jaehyung Ahn

Seongbeom Kim

Uiseok Song

Jongmin Lee

Gunjae Koo

Taeweon Suh

Byungwoo Bang

Hun Seong Choi

Disclosed is a processor for performing a speculative execution for an out-of-order execution. The processor may include: a core; and an L1 cache memory, and the core may include a speculative track buffer (STB) storing speculative track information in order to track the speculative instruction when a speculative instruction is recorded in a reorder buffer (ROB), and a load queue (LQ) transmitting a commit doorbell signal or a restore doorbell signal for a first speculative block to which a first speculative instruction belongs to an L1 cache memory based on first speculative track information of the first speculative instruction when a speculative success or a speculative failure of the first speculative instruction included in the speculative instruction is decided, and the L1 cache memory may include a write buffer.

Processor and operation thereof to revoke cache memory states utilizing write-back buffer

A method and apparatus with cosmic ray fault protection is included. A method includes obtaining cosmic ray information indicating at least one cosmic ray event, determining a soft error mitigation policy based on the cosmic ray information, accessing the soft error mitigation policy by a device, and based on the soft error mitigation policy, performing, by the device, a mitigation action that mitigates for soft errors related to the cosmic ray event.

Method and apparatus with cosmic ray fault protection

An electronic device and method with on-demand accelerator checkpointing are provided. In one general aspect, an electronic device includes a host processor, and an accelerator configured to operate according to instructions transmitted by the host processor to the accelerator, wherein, a memory of the host processor and a memory of the accelerator are respectively checkpointed to a storage at respective different intervals, and in response to a determination that a failure has occurred in the host processor, the memory of the accelerator is checkpointed to the storage.

Electronic device and method with on-demand accelerator checkpointing

Growing community of inventors

Suwon-si, South Korea

Junyeon Lee