Kabushiki Kaisha Toshiba

Junya Sagara

Tetsuya Kurosawa

Shinya Takyu

Mitsuhiro Nakao

Noboru Okane

Hiroshi Tomita

Yoshio Iizuka

Atsushi Yoshimura

Hidekazu Hayashi

Ryoji Matsushima

Shoko Omizo

Masayuki Dohi

Katsuhiro Ishida

Tatsuhiko Shirakawa

Yukiko Kitajima

Kazuhiro Yamamori

Kuniyuki Ohnishi

Norihiro Togasaki

The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.

Semiconductor device and adhesive sheet

A wire bonding method involves bonding a wire in order at a first bonding point and a second bonding point; raising a capillary, through which the wire is inserted, on the second bonding point; cutting the wire by closing a clamper provided above the capillary at a time when the capillary has reached a prescribed height; and measuring a load incurred on the wire at a time of cutting of the wire.

Wire bonding apparatus and wire bonding method

A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.

Method for manufacturing a stacked semiconductor package, and stacked semiconductor package

Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.

Semiconductor device having semiconductor chips stacked and mounted thereon and manufacturing method thereof

An apparatus for manufacturing a semiconductor device, includes: a collet; an alignment stage; and a sheet feeding mechanism. The collet is configured to suck a surface of a semiconductor chip. The surface is on opposite side of a bonding surface to be bonded to a bonding target. The bonding surface is provided with a film-like adhesive layer. The collet includes a heater for heating the adhesive layer. The alignment stage is configured to support the semiconductor chip and to correct position of the semiconductor chip. The sheet feeding mechanism is configured to feed a release sheet onto the alignment stage.

Apparatus and method for manufacturing semiconductor device

A semiconductor device has a plurality of bare chips stacked on at least one of first and second main surfaces oppositely arranged on a support substrate, spacers arranged between two bare chips arranged adjacently in up and down direction among the plurality of bare chips, and inner leads which are arranged at both sides in a horizontal direction of the support substrate and are connected to pads of the bare chips via bonding wires, wherein the bonding wires which connect the pads of the bare chips at one end side of the spacers to the corresponding inner leads, are arranged not to contact the bare chip at the other end side of the same spacer.

Semiconductor device and manufacturing method thereof

Growing community of inventors

Kawasaki, Japan

Junya Sagara