Kabushiki Kaisha Toshiba

Junya Nagano

Eiichi Hosomi

Masatoshi Fukuda

Yasuhiro Koshio

Atsushi Kurosu

Mitsuru Oida

Tetsuya Nagaoka

Hiroshi Funakura

Osamu Yamagata

Kaoru Kawai

A semiconductor package has (a) a package base, (b) package terminals formed on the package base and used to connect the semiconductor package to another device, (c) a wiring layer formed on the package base and electrically connected to the package terminals, (d) a semiconductor chip mounted on the package base and electrically connected to the wiring layer, (e) a low-elasticity resin layer formed between a resin mold and the wiring layer and between the package base and the resin mold, and (f) the resin mold sealing the package base, the wiring layer, the semiconductor chip, and the low-elasticity resin layer.

Semiconductor package and method of manufacturing the same

A semiconductor device having an interconnecting circuit board includes an island formed in a predetermined plane, a semiconductor chip disposed on the island and having a plurality of electrically connecting electrode pads, an interconnecting circuit board disposed on the semiconductor chip and having an electrically conductive pattern, a plurality of inner leads disposed around the island, a first electrically connecting wire connecting the electrically conductive pattern and one of the plurality of electrically connecting electrode pads, and a second electrically connecting wire connecting the electrically conductive pattern and one of the inner leads.

Semiconductor device having an interconnecting circuit board

Semiconductor device having an interconnecting circuit board and method

Growing community of inventors

Kanagawa-ken, Japan

Junya Nagano