Nuvolta Technologies (hefei) Co., Ltd.

Analog Devices Technology

Analog Devices Global

Nuvolta Technologies (heifei) Co., Ltd.

Junxiao Chen

Zeng Li

Jinbiao Huang

Bin Shao

Gang Dai

Yingying Yang

Fengyu He

Zhijun Luo

Danzhu Lu

Sichao Liu

Min Yang

Xintao Wang

Zhijie Zhu

Roger Feng

Wei Zheng

A method includes configuring a wireless power transfer system to operate in a sleep mode to reduce a quiescent current of the wireless power transfer system, configuring the wireless power transfer system to operate in a magnetic detection mode, wherein in the magnetic detection mode, an excitation is applied to a resonant tank of the wireless power transfer system, detecting a signal having a resonant attenuation envelope, wherein the signal is generated by the resonant tank, and configuring the wireless power transfer system to operate in an active mode after finding an object is magnetically coupled to the wireless power transfer system.

Object detection apparatus and method for wireless power transfer system

An apparatus includes a rectifier coupled to a coil of a wireless power transfer system, the rectifier comprising a first leg and a second leg, wherein the first leg comprises a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, and the second leg comprise a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, and wherein a gate drive signal of the first switch is derived from a signal in phase with a voltage on a first terminal of the coil, and a gate drive signal of the third switch is derived from a signal in phase with a voltage on a second terminal of the coil.

H-bridge gate control apparatus

A method includes detecting a signal on a switching node connected to a power switch, detecting a gate drive voltage of the power switch, during a gate drive process of the power switch, reducing a gate drive current based on a first comparison result obtained from comparing the signal with a first threshold, and during the gate drive process of the power switch, increasing the gate drive current based on a second comparison result obtained from comparing the gate drive voltage with a second threshold.

Gate drive apparatus and method thereof

A method includes configuring a high voltage charging system to operate in a wireless charging mode to charge a battery after a power source has been disconnected from the high voltage charging system, wherein the high voltage charging system comprises a rectifier, a first power converter, a second power converter connected in cascade, and a load switch connected between a voltage bus and a power port configured to be connected to the power source, and configuring the high voltage charging system to operate in a wired charging mode to charge the battery after the power source has been connected to the high voltage charging system.

High voltage hybrid charging system and method

A method includes configuring a hybrid converter to operate in a hybrid mode comprising four operating phases in response to an input voltage of the hybrid converter greater than a first threshold, configuring the hybrid converter to operate in a buck mode comprising two operating phases in response to the input voltage of the hybrid converter less than a second threshold, and configuring the hybrid converter to operate in a charge pump mode comprising two operating phases in response to the input voltage of the hybrid converter less than the first threshold and greater than the second threshold.

Hybrid power converter

An apparatus comprises a rectifier configured to convert an alternating current voltage into a direct current voltage, wherein the alternating current voltage is generated by a receiver coil configured to be magnetically coupled to a transmitter coil of a wireless power transfer system, a high efficiency power converter connected to the rectifier, the high efficiency power converter comprising a first stage and a second stage connected in cascade and a controller configured to detect a plurality of operating parameters and generate a control signal applied to a control loop of the first stage.

High efficiency power converting apparatus and control method

A device comprises a first current sense apparatus coupled to a first switching element of a power conversion apparatus, a second current sense apparatus coupled to a second switching element of the power conversion apparatus and a current sense processing apparatus configured to receive detected current signals from the first current sense apparatus and the second current sense apparatus, and generate an average current signal and a peak current signal.

Demodulation apparatus and method for wireless power transmitter

A system includes a receiver coil configured to be magnetically coupled to a transmitter coil, a rectifier connected to a voltage bus through a switch, a first power converter and a second power converter connected in cascade between the switch and a battery and a load switch connected between the voltage bus and a power port configured to be connected to a power source.

An apparatus includes a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, wherein a common node of the first switch and the second switch is connected to a first terminal of a first coil magnetically coupled to a second coil, and a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, wherein a common node of the third switch and the fourth switch is coupled to a second terminal of the first coil, and wherein a gate of the first switch is controlled by a first signal derived from a signal on the common node of the third switch and the fourth switch, and a gate of the third switch is controlled by a second signal derived from a signal on the common node of the first switch and the second switch.

A converter comprises a first switch, a capacitor and a second switch connected in series between an input voltage source and an output filter, a third switch connected between a common node of the first switch and the capacitor, and a common node of the second switch and the output filter and a fourth switch connected between a common node of the capacitor and the second switch, and ground.

An active voltage divider circuit is provided comprising: a first node; a second node; a third node; multiple FET load devices coupled in series between the first node and the second node; multiple first switches, each associated with a different FET load device and configured to selectably couple a respective associated bypass circuit between source and drain of its associated FET load device; and second switch circuitry configured to selectably couple a drain of a FET load device, from among the multiple FET load devices, to the third node.

Active device divider circuit with adjustable IQ

Apparatus and methods for generating a drive signal of a switching signal are disclosed. A first circuit receives an oscillating reference signal, a first compensation signal, a second compensation signal, and a third compensation signal. The first compensation signal is indicative of an error between an output voltage of a power converter and a reference voltage. The second compensation signal is indicative of the error relative to a threshold. The third compensation signal is indicative of an output current of the power converter. The first circuit generates a comparison signal having a waveform including pulses having durations based at least partly on a combination of the periodic reference signal, the first compensation signal, the second compensation signal, and the third compensation signal. A second circuit receives a clock signal and the comparison signal and generates a drive signal for activation and deactivation of a driver transistor.

Apparatus and methods for transient compensation of switching power regulators

A method can reuse at least one pin in demultiplexing (demuxing) a voltage from a pin. The method can be used to set an accurate current limit threshold in a design for test (DFT) phase and, thus, to accurately set a trimming code of a current limiter. The method uses the property that a power MOSFET has almost a same conductive resistance at a large drain current. Thus, the current limit threshold can be set according to an accurate drain-to-source voltage Vat a small current sink that is less than a maximum current that ATE is able to provide. An accurate voltage Vcan be measured through Kelvin sensing drain and source pins of the power MOSFET, which are connected to a current sense circuit.

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Shanghai, China

Junxiao Chen