Boe Technology Group Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Chinese Academy of Sciences

Junxi Wang

Xiangdan Dong

Fan He

Cong Fan

Kemeng Tong

Bo Zhang

Tingliang Liu

Huijuan Yang

Jinmin Li

Yi Zhang

Tinghua Shang

Jie Dai

Siyu Wang

Rong Wang

Mengqi Wang

Lulu Yang

Chi Yu

Yulong Wei

Hua Yang

Yixiang Yang

Xiaoyan Yi

Hao Zhang

Yu Wang

Ming Hu

Xin Zhang

Yang Zhou

Shun Zhang

Xin Jin

Lu Bai

Pengfei Yu

Meng Zhang

Xiaofeng Jiang

Yi Qu

Mengmeng Du

Huijun Li

Wenbin Yang

Pengyu Liao

Jiping Zhao

Jie Gou

Yuhang Peng

Lixia Zhao

Chao Tan

Zichao Zhou

Qingfeng Kong

Jinxia Guo

Disclosed are a display panel and a display device. In the display panel, at least one first data connection portion is respectively electrically connected to at least one data line and at least one first data transmission line through a first data via hole; at least one row of first-type sub-pixels corresponds to at least one first data connection portion; for a first scanning line and the first data connection portion corresponding to the same row of sub-pixels, and the first data line and the first data transmission line electrically connected through the first data connection portion, the orthographic projections of the first data connection portion and the first scanning line have an overlapping area, and the orthographic projections of the first data line and the first data transmission line are not overlapped with the orthographic projection of the first scanning line.

Display panel and display device

An anti-corrosion circuit, an array substrate and an electronic device are provided. The array substrate includes: source signal lines, provided in the display area, extending along a first direction and arranged sequentially along a second direction; a first power bus line, provided in the peripheral area and including a main body portion extending along the second direction; an electrostatic discharge protection circuit, provided on a side of the main body portion away from the display area and electrically connected to the source signal lines, and including first sub-signal lines and second sub-signal lines. The first sub-signal lines and the second sub-signal lines extend along the second direction and are alternately arranged along the first direction, and the main body portion is adjacent to one first sub- signal line, and electrical property of the first power bus line is the same as electrical property of the one first sub-signal line.

Anti-corrosion circuit, electrostatic discharge protection circuit, array substrate and electronic device

Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.

A display panel, a method of manufacturing the display panel and a display device are provided in the present disclosure. The display panel includes: a substrate, a functional film layer arranged on the substrate, a first bending region capable of being bent along a first direction, a second bending region capable of being bent along a second direction, and a third bending region located between the first bending region and the second bending region. The first direction intersects the second direction. The functional film layer includes a non-hollowed region located in at least one of the first bending region and the second bending region, and a part of the functional film layer located in the third bending region includes a plurality of functional via holes spaced from each other.

Display panel, method of manufacturing the same and display device

A touch display panel, includes: a base substrate, and a display structure and a touch structure that are stacked on the base substrate, the touch structure includes a first metal mesh layer, an orthographic projection of a mesh hole of at least one first metal mesh of the first metal mesh layer on the base substrate covers orthographic projections of two pixel opening regions of two adjacent sub-pixels on the base substrate, and the two adjacent sub-pixels are configured to emit light of a first primary color; and a center distance between two pixel opening regions is smaller than a center distance between two pixel opening regions of two sub-pixels emitting light of same one other primary color, which is different to the first primary color. The touch display panel has a good display effect.

Touch display panel and electronic device

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of subpixels arranged on the base substrate in an array form. The plurality of subpixels includes a plurality of display subpixels at a display region of the display substrate and a plurality of virtual subpixels, and at least a part of the virtual subpixels are arranged adjacent to the display subpixels. The virtual subpixel includes a first potential signal line pattern, a virtual subpixel driving circuit including a virtual driving transistor and a first conductive connection member coupled to a gate electrode of the virtual driving transistor, and a second conductive connection member coupled to the first conductive connection member and the first potential signal line pattern.

Display substrate with virtual subpixels, manufacturing method thereof, and display device

A touch structure, a touch display panel and an electronic device are provided. The touch structure includes a first metal mesh layer and a second metal mesh layer, the first metal mesh layer includes a first touch electrode and second touch sub-electrodes, the second metal mesh layer includes second connection electrodes spaced apart from each other, and each of the second connection electrodes is electrically connected with an adjacent second touch sub-electrode through via holes in the insulation layer. At least two first metal meshes of the second touch sub-electrodes include multiple vertices overlapping with at least two second metal meshes of the second connection electrodes, the multiple vertices include connection vertices, and the via holes are respectively disposed at the connection vertices; at most one of vertices adjacent to each connection vertex is a connection vertex. The touch structure can effectively reduce capacitance load on the touch electrodes.

Touch structure, touch display panel and electronic device

Provided are a display panel, a manufacturing method thereof, and a display device. The display panel includes an alignment mark region arranged within a flat region of a peripheral region of the display panel. The peripheral region is a region of the display panel other than an active area of the display panel. An alignment mark pattern is arranged within the alignment mark region, and/or at least one film layer within the alignment mark region is hollowed out.

Display panel, manufacturing method thereof, and display device

A touch structure, a touch display panel and an electronic device are provided. The touch structure includes a first metal mesh layer including first touch electrodes spaced and extended along a first direction, each first touch electrode includes first touch sub-electrodes and first connection electrodes arranged along the first direction and connected with each other, and the first metal mesh layer further includes second touch sub-electrodes spaced and arranged sequentially along a second direction; at least one first metal mesh includes three insulated first metal mesh parts which are respectively belong to three insulated touch sub-electrodes; the three touch sub-electrodes include two first touch sub-electrodes adjacent in the second direction and a second touch sub-electrode, or includes two second touch sub-electrodes adjacent in the first direction and a first touch sub-electrode.

A touch display panel, includes: a base substrate, and a display structure and a touch structure that are stacked on the base substrate, the touch structure includes a first metal mesh layer, an orthographic projection of a mesh hole of at least one first metal mesh of the first metal mesh layer on the base substrate covers orthographic projections of two pixel opening regions of two adjacent sub-pixels on the base substrate, and the two adjacent sub-pixels are configured to emit light of a first primary color; and a center distance between two pixel opening regions is smaller than a center distance between two pixel opening regions of two sub-pixels emitting light of same one other primary color, which is different to the first primary color.

The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

Method of aligning quadrate wafer in first photolithography process

The present invention provides a shift register, which comprises a first signal conversion module and a second signal conversion module, the first signal conversion module being connected to an start signal input terminal, a clock signal terminal, a high-level input terminal, a low-level input terminal and an input terminal of the second signal conversion module, respectively, and the second signal conversion module being connected to an output terminal of the first signal conversion module, the clock signal terminal, a signal output terminal, a high-level input terminal and a low-level input terminal, respectively. The present invention also provides a shift register, a gate driving circuit and a display device. The shift register cell provided by the present invention only needs a single-phase clock signal to perform control, thereby simplifying the structure of the shift register cell.

Shift register cell, shift register, gate driving circuit and display device

The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same. The light emitting diode packaging structure has an insulating substrate with through holes formed on each side of the upper surface thereof, the through hole being filled with conductive metal. Additionally, a n-type layer, an active layer, a p-type layer, an insulating layer and a p-type electrode are formed on the insulating substrate. The structure further may include a n-type electrode provided on a side of the upper surface of the n-type layer; a first back electrode provided at one side of the back surface of the insulating substrate; a second back electrode provided at the other side of back surface of the insulating substrate; and an optical element packaged on the base substrate.

Packaging structure of light emitting diode and method of manufacturing the same

The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system includes an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

Multi-functional online testing system for semiconductor light-emitting devices or modules and method thereof

Growing community of inventors

Beijing, China

Junxi Wang