Samsung Electronics Co., Ltd.

Hyundai Motor Company

Kia Corporation

Hyundai Wia Corporation

Junseok Park

Sung Keun Lim

Taewoo Lee

Jeong Won Song

Dongin Kim

Sung-Hyun Cho

Heonsoo Lee

Chaesuk Lim

Taemin Lee

Jong Chan Lee

Heon Kang

Hyukjae Jang

Kyungah Jeong

Sungho Jun

Sangmin Suh

Ji Seung Ryu

Jaehun Chung

Byungchul Hong

Yeong Taek Lee

Won Hee Hong

Inyup Kang

Sehwan Lee

Joonho Song

Junwoo Jang

Gwang-ok Go

Suhwan Kim

Jinook Song

Dongki Kim

Intae Hwang

JoonHee Lee

Daekyeung Kim

Yunkyo Cho

Woocheol Cho

Kyunghan Min

Pu Reun Lee

Ilkueon Kang

Minsik Son

Hyunkoo Kim

Disclosed is a method of operating a storage controller which communicates with a host and a non-volatile memory device. The method includes receiving a first state transition request for a device open from the host, performing a first active zone refresh operation of the non-volatile memory device in response to the first state transition request such that a zone, which has an active state before an immediately previous power-off is processed to a sequentially writable state in one block, receiving, by a first buffer memory, first target data to be stored in a first block of a first zone among the plurality of zones from the host depending on a first write request, receiving a first power-off request from the host, during processing the first write request, and storing the first target data in a first power loss protection (PLP) block of the non-volatile memory device.

Storage controller performing active zone refresh, method of operating storage controller, and method of operating storage device having storage controller

In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.

Multi-port queueing cache and data processing system including the same

A control apparatus of an electric vehicle includes a twin clutch including a first clutch and a second clutch and configured to adjust power transmission from a drive motor to a first rear wheel and a second rear wheel of the vehicle through the first clutch corresponding to the first rear wheel and the second clutch corresponding to the second rear wheel, a vehicle controller electrically connected to the drive motor and configured to, when an entering condition for entering an oversteer mode is satisfied, determine an initial regenerative braking torque for entering the oversteer mode, determine a target slip ratio of the first and second rear wheels, and control the regenerative braking torque of the drive motor to follow the target slip ratio, and a clutch controller electrically connected to the twin clutch and configured to adjust clutch torques of the first clutch and the second clutch of the twin clutch so that slip ratios of the first and second rear wheels are synchronized.

Control apparatus and control method of an electric vehicle

An arithmetic apparatus includes a first operand holding circuit configured to output a first operand according to a clock signal, generate an indicator signal based on bit values of high-order bit data including a most significant bit of the first operand, and gate the clock signal based on the indicator signal, the clock signal being applied to a flip-flop latching the high-order bit data of the first operand; a second operand holding circuit configured to output a second operand according to the clock signal; and an arithmetic circuit configured to perform data gating on the high-order bit data of the first operand based on the indicator signal and output an operation result by performing an operation using a modified first operand resulting from the data gating and the second operand.

Arithmetic apparatus, operating method thereof, and neural network processor

Disclosed is a method of operating a storage controller, the storage controller communicating with a host and a non-volatile memory device. The method includes receiving a first erase request from the host, the first erase request being for a first zone of a plurality of zones of the non-volatile memory device, loading first allocation list information of the first zone from an allocation list table based on the first erase request, deallocating memory blocks allocated to the first zone based on the first allocation list information, wherein sequential physical page numbers of the memory blocks are respectively mapped onto sequential logical page numbers, and providing the non-volatile memory device with a physical erase request for the deallocated memory blocks of the first zone.

Storage controller deallocating memory block, method of operating the same, and method of operating storage device including the same

A driving torque distribution apparatus has a rapid response speed by applying a ball ramp device including a ball which is rolling-supported between a worm wheel rotated by a worm gear and a cam ring fixed in a rotation direction, and configured to generate an axial directional pressurizing force in conjunction with the rotation of the worm wheel, as first and second operation units to control first and second clutch units, and is configured so that an axial directional load due to pressurizing forces of the first and second operation units is canceled within each drum by a snap ring and a spacer fixed to internal and external sides of each drum of the first and second clutch units, preventing an interface between axial directional loads acting on the first and second clutch units.

Driving torque distribution apparatus

A device configured to compress a tensor including a plurality of cells includes: a quadtree generator configured to generate a quadtree searching for a non-zero cell included in the tensor and extract at least one parameter value from the quadtree; a mode selector configured to determine a compression mode based on the at least one parameter; and a bitstream generator configured to generate a bitstream by compressing the tensor based on the compression mode.

Compressing device and method using parameters of quadtree method

A driving force distribution device includes a lubrication path LP supplying lubricating oil from an oil inlet positioned on the case outside a cylinder into a hub of each clutch unit through an oil hole positioned between an external surface of the cylinder of each operation unit and a bearing supporting the same, between a spacer supporting the bearing and a snap ring supporting the spacer, between an internal diameter of the cylinder of each operation unit and an external diameter of a drum of each clutch unit, and in the drum of each clutch unit, allowing left and right lubrication paths for lubrication of left and right clutch units to have the shortest length, and simultaneously, each flow path to have an increased size.

Driving force distribution device

An electric vehicle includes a drive motor configured for generating power required for driving of the vehicle, a twin clutch which may include a first clutch and a second clutch and configured to adjust distribution of the power supplied from the drive motor to a first drive wheel and a second drive wheel of the vehicle through the first clutch corresponding to the first drive wheel and the second clutch corresponding to the second drive wheel, and a controller electrically connected to the twin clutch and configured to, when a control condition for a deceleration turning of the vehicle is satisfied, determine a control torque of the twin clutch as a larger value of an initial torque to prevent slip of the twin clutch and a base torque determined based on output torque of the drive motor, and distribute the control torque to the first clutch and the second clutch depending on a drive mode of the vehicle.

Electric vehicle and control method thereof

An apparatus of controlling a twin clutch includes: a twin clutch that selectively blocks power supplied from a drive motor to a pair of drive wheels of a vehicle; and a clutch controller that is configured to control the twin clutch by determining target torques applied to respective clutches included in the twin clutch, based on the straight-line driving state detected by the driving information detection unit, determining a correction error based on a difference between actual torques applied to the respective clutches included in the twin clutch when a preliminary activation signal, which is determined based on the target torques, is turned on and a main activation signal, which is determined based on the actual torques applied to the respective clutches, is turned on, determining a balancing control compensation amount based on the correction error, and determining a final control amounts applied to the respective clutches based on the balancing control compensation amount.

Apparatus of controlling twin clutch and method thereof

An neural network (NN) processor includes an input feature map buffer configured to store an input feature matrix, a weight buffer configured to store a weight matrix trained in a form of a, a transform circuit configured to perform a Walsh-Hadamard transform on an input feature vector obtained from the input feature matrix and a weight vector included in the weight matrix to output a transformed input feature vector and a transformed weight vector, and an arithmetic circuit configured to perform an element-wise multiplication (EWM) on the transformed input feature vector and the transformed weight vector.

Neural network processor using dyadic weight matrix and operation method thereof

An operation method of a nonvolatile memory system includes receiving a write command from an external device, determining continuity of the write command based on an idle time, and performing a write operation of the write command in one of a fast mode and a normal mode based on the determination result.

Method of performing a write operation based on an idle time

A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.

Nonvolatile storage device and operating system (OS) image program method thereof

Growing community of inventors

Seoul, South Korea

Junseok Park